add LwIP network stack

board/stm32f407-st-discovery/third_party_driver/Kconfig

@@ -98,6 +98,11 @@ if BSP_USING_USB
 source "$BSP_DIR/third_party_driver/usb/Kconfig"
 endif
 
+menuconfig BSP_USING_LWIP
+bool "Using LwIP device"
+default n
+select RESOURCES_LWIP
+
 menuconfig BSP_USING_WDT
 bool "Using WATCHDOG device"
 default y

board/stm32f407-st-discovery/third_party_driver/Makefile

@@ -50,4 +50,8 @@ ifeq ($(CONFIG_BSP_USING_WDT),y)
   SRC_DIR += watchdog
 endif
 
+ifeq ($(CONFIG_BSP_USING_LWIP),y)
+  SRC_DIR += ethernet
+endif
+
 include $(KERNEL_ROOT)/compiler.mk

board/stm32f407-st-discovery/third_party_driver/ethernet/Kconfig

@@ -0,0 +1,12 @@
+
+config CAN_BUS_NAME_1
+    string "can bus name"
+    default "can1"
+
+config CAN_DRIVER_NAME
+    string "can driver name"
+    default "can1_drv"
+
+config CAN_1_DEVICE_NAME_1
+    string "can bus 1 device 1 name"
+    default "can1_dev1"

board/stm32f407-st-discovery/third_party_driver/ethernet/Makefile

@@ -0,0 +1,4 @@
+SRC_FILES := hardware_ethernet.c   connect_ethernet.c  ethernetif.c
+
+
+include $(KERNEL_ROOT)/compiler.mk

board/stm32f407-st-discovery/third_party_driver/ethernet/connect_ethernet.c

@@ -0,0 +1,363 @@
+/**
+  ******************************************************************************
+  * @file    stm32f4x7_eth_bsp.c
+  * @author  MCD Application Team
+  * @version V1.0.0
+  * @date    31-October-2011 
+  * @brief   STM32F4x7 Ethernet hardware configuration.
+  ******************************************************************************
+  * @attention
+  *
+  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
+  ******************************************************************************
+  */
+
+ /*
+* Copyright (c) 2020 AIIT XUOS Lab
+* XiUOS is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*        http://license.coscl.org.cn/MulanPSL2
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+* See the Mulan PSL v2 for more details.
+*/
+
+/**
+* @file connect_ethernet.c
+* @brief Adapted network software protocol stack and hardware operation functions
+* @version 1.0 
+* @author AIIT XUOS Lab
+* @date 2021-05-29
+*/
+
+/* Includes ------------------------------------------------------------------*/
+#include "hardware_syscfg.h"
+#include "hardware_gpio.h"
+#include "hardware_rcc.h"
+#include "misc.h"
+#include "hardware_exti.h"
+#include "hardware_eth.h"
+#include "connect_ethernet.h"
+#include <xs_base.h>
+#include <xs_sem.h>
+#include <xs_isr.h>
+
+__IO uint32_t  EthInitStatus = 0;
+__IO uint8_t EthLinkStatus = 0;
+
+/* Private function prototypes -----------------------------------------------*/
+static void ETH_GPIO_Config(void);
+static void ETH_MACDMA_Config(void);
+
+extern int32 s_xSemaphore; 
+
+
+/* Private functions ---------------------------------------------------------*/
+
+/**
+  * @brief  ETH_BSP_Config
+  * @param  None
+  * @retval None
+  */
+void ETH_BSP_Config(void)
+{
+  RCC_ClocksTypeDef RCC_Clocks;
+
+  /* Configure the GPIO ports for ethernet pins */
+  ETH_GPIO_Config();
+  
+  /* Configure the Ethernet MAC/DMA */
+  ETH_MACDMA_Config();
+
+  if (EthInitStatus == 0)
+  {
+    while(1);
+  }
+
+  /* Configure Systick clock source as HCLK */
+  SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK);
+
+  /* SystTick configuration: an interrupt every 10ms */
+  RCC_GetClocksFreq(&RCC_Clocks);
+
+  SysTick_Config(RCC_Clocks.HCLK_Frequency / 100);  
+}
+
+/**
+  * @brief  Configures the Ethernet Interface
+  * @param  None
+  * @retval None
+  */
+static void ETH_MACDMA_Config(void)
+{
+  ETH_InitTypeDef ETH_InitStructure;
+
+  /* Enable ETHERNET clock  */
+  RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_ETH_MAC | RCC_AHB1Periph_ETH_MAC_Tx |
+                        RCC_AHB1Periph_ETH_MAC_Rx, ENABLE);
+                        
+  /* Reset ETHERNET on AHB Bus */
+  ETH_DeInit();
+
+  /* Software reset */
+  ETH_SoftwareReset();
+
+  /* Wait for software reset */
+  while (ETH_GetSoftwareResetStatus() == SET);
+
+  /* ETHERNET Configuration --------------------------------------------------*/
+  /* Call ETH_StructInit if you don't like to configure all ETH_InitStructure parameter */
+  ETH_StructInit(&ETH_InitStructure);
+
+  /* Fill ETH_InitStructure parametrs */
+  /*------------------------   MAC   -----------------------------------*/
+  ETH_InitStructure.ETH_AutoNegotiation = ETH_AutoNegotiation_Enable;
+
+
+  ETH_InitStructure.ETH_LoopbackMode = ETH_LoopbackMode_Disable;
+  ETH_InitStructure.ETH_RetryTransmission = ETH_RetryTransmission_Disable;
+  ETH_InitStructure.ETH_AutomaticPadCRCStrip = ETH_AutomaticPadCRCStrip_Disable;
+  ETH_InitStructure.ETH_ReceiveAll = ETH_ReceiveAll_Disable;
+  ETH_InitStructure.ETH_BroadcastFramesReception = ETH_BroadcastFramesReception_Enable;
+  ETH_InitStructure.ETH_PromiscuousMode = ETH_PromiscuousMode_Disable;
+  ETH_InitStructure.ETH_MulticastFramesFilter = ETH_MulticastFramesFilter_Perfect;
+  ETH_InitStructure.ETH_UnicastFramesFilter = ETH_UnicastFramesFilter_Perfect;
+#ifdef CHECKSUM_BY_HARDWARE
+  ETH_InitStructure.ETH_ChecksumOffload = ETH_ChecksumOffload_Enable;
+#endif
+
+  /*------------------------   DMA   -----------------------------------*/  
+  
+  /* When we use the Checksum offload feature, we need to enable the Store and Forward mode: 
+  the store and forward guarantee that a whole frame is stored in the FIFO, so the MAC can insert/verify the checksum, 
+  if the checksum is OK the DMA can handle the frame otherwise the frame is dropped */
+  ETH_InitStructure.ETH_DropTCPIPChecksumErrorFrame = ETH_DropTCPIPChecksumErrorFrame_Enable; 
+  ETH_InitStructure.ETH_ReceiveStoreForward = ETH_ReceiveStoreForward_Enable;         
+  ETH_InitStructure.ETH_TransmitStoreForward = ETH_TransmitStoreForward_Enable;     
+ 
+  ETH_InitStructure.ETH_ForwardErrorFrames = ETH_ForwardErrorFrames_Disable;       
+  ETH_InitStructure.ETH_ForwardUndersizedGoodFrames = ETH_ForwardUndersizedGoodFrames_Disable;   
+  ETH_InitStructure.ETH_SecondFrameOperate = ETH_SecondFrameOperate_Enable;
+  ETH_InitStructure.ETH_AddressAlignedBeats = ETH_AddressAlignedBeats_Enable;      
+  ETH_InitStructure.ETH_FixedBurst = ETH_FixedBurst_Enable;                
+  ETH_InitStructure.ETH_RxDMABurstLength = ETH_RxDMABurstLength_32Beat;          
+  ETH_InitStructure.ETH_TxDMABurstLength = ETH_TxDMABurstLength_32Beat;
+  ETH_InitStructure.ETH_DMAArbitration = ETH_DMAArbitration_RoundRobin_RxTx_2_1;
+
+  /* Configure Ethernet */
+  EthInitStatus = ETH_Init(&ETH_InitStructure, DP83848_PHY_ADDRESS);
+}
+
+/**
+  * @brief  Configures the different GPIO ports.
+  * @param  None
+  * @retval None
+  */
+void ETH_GPIO_Config(void)
+{
+  GPIO_InitTypeDef GPIO_InitStructure;
+  
+  /* Enable GPIOs clocks */
+  RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA | 
+                                                             RCC_AHB1Periph_GPIOB |
+                                                             RCC_AHB1Periph_GPIOC | 
+                                                             RCC_AHB1Periph_GPIOI |
+                                                             RCC_AHB1Periph_GPIOG | 
+                                                             RCC_AHB1Periph_GPIOH |
+                                                             RCC_AHB1Periph_GPIOF, ENABLE);
+
+  /* Enable SYSCFG clock */
+  RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);  
+
+  /* Configure MCO (PA8) */
+  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8;
+  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
+  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
+  GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
+  GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;  
+  GPIO_Init(GPIOA, &GPIO_InitStructure);
+  
+  /* MII/RMII Media interface selection --------------------------------------*/
+#ifdef MII_MODE /* Mode MII with STM324xG-EVAL  */
+ #ifdef PHY_CLOCK_MCO
+
+
+  /* Output HSE clock (25MHz) on MCO pin (PA8) to clock the PHY */
+  RCC_MCO1Config(RCC_MCO1Source_HSE, RCC_MCO1Div_1);
+ #endif /* PHY_CLOCK_MCO */
+
+  SYSCFG_ETH_MediaInterfaceConfig(SYSCFG_ETH_MediaInterface_MII);
+#elif defined RMII_MODE  /* Mode RMII with STM324xG-EVAL */
+
+  SYSCFG_ETH_MediaInterfaceConfig(SYSCFG_ETH_MediaInterface_RMII);
+#endif
+
+/* Ethernet pins configuration ************************************************/
+   /*
+        ETH_MDIO -------------------------> PA2
+        ETH_MDC --------------------------> PC1
+        ETH_PPS_OUT ----------------------> PB5
+        ETH_MII_CRS ----------------------> PH2
+        ETH_MII_COL ----------------------> PH3
+        ETH_MII_RX_ER --------------------> PI10
+        ETH_MII_RXD2 ---------------------> PH6
+        ETH_MII_RXD3 ---------------------> PH7
+        ETH_MII_TX_CLK -------------------> PC3
+        ETH_MII_TXD2 ---------------------> PC2
+        ETH_MII_TXD3 ---------------------> PB8
+        ETH_MII_RX_CLK/ETH_RMII_REF_CLK---> PA1
+        ETH_MII_RX_DV/ETH_RMII_CRS_DV ----> PA7
+        ETH_MII_RXD0/ETH_RMII_RXD0 -------> PC4
+        ETH_MII_RXD1/ETH_RMII_RXD1 -------> PC5
+        ETH_MII_TX_EN/ETH_RMII_TX_EN -----> PG11
+        ETH_MII_TXD0/ETH_RMII_TXD0 -------> PG13
+        ETH_MII_TXD1/ETH_RMII_TXD1 -------> PG14
+                                                  */
+
+  /* Configure PA1, PA2 and PA7 */
+  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_7;
+  GPIO_Init(GPIOA, &GPIO_InitStructure);
+  GPIO_PinAFConfig(GPIOA, GPIO_PinSource1, GPIO_AF_ETH);
+  GPIO_PinAFConfig(GPIOA, GPIO_PinSource2, GPIO_AF_ETH);
+  GPIO_PinAFConfig(GPIOA, GPIO_PinSource7, GPIO_AF_ETH);
+
+  /* Configure PB11 and PB12 */
+  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13;
+  GPIO_Init(GPIOB, &GPIO_InitStructure);
+  GPIO_PinAFConfig(GPIOB, GPIO_PinSource11, GPIO_AF_ETH);	
+  GPIO_PinAFConfig(GPIOB, GPIO_PinSource12, GPIO_AF_ETH);
+  GPIO_PinAFConfig(GPIOB, GPIO_PinSource13, GPIO_AF_ETH);
+
+  /* Configure PC1, PC2, PC3, PC4 and PC5 */
+  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5;
+  GPIO_Init(GPIOC, &GPIO_InitStructure);
+  GPIO_PinAFConfig(GPIOC, GPIO_PinSource1, GPIO_AF_ETH);
+  GPIO_PinAFConfig(GPIOC, GPIO_PinSource4, GPIO_AF_ETH);
+  GPIO_PinAFConfig(GPIOC, GPIO_PinSource5, GPIO_AF_ETH);
+                                
+}
+
+/**
+  * @brief  Configure the PHY to generate an interrupt on change of link status.
+  * @param PHYAddress: external PHY address  
+  * @retval None
+  */
+uint32_t Eth_Link_PHYITConfig(uint16_t PHYAddress)
+{
+  uint32_t tmpreg = 0;
+
+  /* Read MICR register */
+  tmpreg = ETH_ReadPHYRegister(PHYAddress, PHY_MICR);
+
+  /* Enable output interrupt events to signal via the INT pin */
+  tmpreg |= (uint32_t)PHY_MICR_INT_EN | PHY_MICR_INT_OE;
+
+  if(!(ETH_WritePHYRegister(PHYAddress, PHY_MICR, tmpreg)))
+  {
+    /* Return ERROR in case of write timeout */
+    return ETH_ERROR;
+  }
+  /* Read MISR register */
+  tmpreg = ETH_ReadPHYRegister(PHYAddress, PHY_MISR);
+
+  /* Enable Interrupt on change of link status */
+  tmpreg |= (uint32_t)PHY_MISR_LINK_INT_EN;
+
+  if(!(ETH_WritePHYRegister(PHYAddress, PHY_MISR, tmpreg)))
+  {
+
+    /* Return ERROR in case of write timeout */
+    return ETH_ERROR;
+  }
+
+  /* Return SUCCESS */
+  return ETH_SUCCESS;   
+}
+
+/**
+  * @brief  EXTI configuration for Ethernet link status.
+  * @param PHYAddress: external PHY address  
+  * @retval None
+  */
+void Eth_Link_EXTIConfig(void)
+{
+  GPIO_InitTypeDef GPIO_InitStructure;
+  EXTI_InitTypeDef EXTI_InitStructure;
+  NVIC_InitTypeDef NVIC_InitStructure;
+
+  /* Enable the INT (PB14) Clock */
+  RCC_AHB1PeriphClockCmd(ETH_LINK_GPIO_CLK, ENABLE);
+  RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
+
+  /* Configure INT pin as input */
+  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
+  GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
+  GPIO_InitStructure.GPIO_Pin = ETH_LINK_PIN;
+  GPIO_Init(ETH_LINK_GPIO_PORT, &GPIO_InitStructure);
+
+  /* Connect EXTI Line to INT Pin */
+  SYSCFG_EXTILineConfig(ETH_LINK_EXTI_PORT_SOURCE, ETH_LINK_EXTI_PIN_SOURCE);
+
+  /* Configure EXTI line */
+  EXTI_InitStructure.EXTI_Line = ETH_LINK_EXTI_LINE;
+  EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
+  EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;  
+  EXTI_InitStructure.EXTI_LineCmd = ENABLE;
+  EXTI_Init(&EXTI_InitStructure);
+
+  /* Enable and set the EXTI interrupt to the highest priority */
+  NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);  
+  NVIC_InitStructure.NVIC_IRQChannel = EXTI15_10_IRQn;
+  NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
+  NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
+  NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+  NVIC_Init(&NVIC_InitStructure);
+}
+
+/**
+  * @brief  This function handles Ethernet link status.
+  * @param  None
+  * @retval None
+  */
+void Eth_Link_ITHandler(uint16_t PHYAddress)
+{
+  /* Check whether the link interrupt has occurred or not */
+  if(((ETH_ReadPHYRegister(PHYAddress, PHY_MISR)) & PHY_LINK_STATUS) != 0)
+  {
+    EthLinkStatus = ~EthLinkStatus;
+
+  }
+}
+
+void assert_failed(uint8_t* file, uint32_t line)
+{
+  /* User can add his own implementation to report the file name and line number,
+     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+  /* Infinite loop */
+  while (1)
+  {}
+}
+
+#ifdef BSP_USING_LWIP
+void ETHERNET_IRQHandler(int irq_num, void *arg)
+{
+  KPrintf("ethernet irq comes one ...\n");
+  ETH_DMAClearITPendingBit(ETH_DMA_IT_R);
+   ETH_DMAClearITPendingBit(ETH_DMA_IT_NIS);
+  KSemaphoreAbandon(s_xSemaphore);
+}
+DECLARE_HW_IRQ(ETH_IRQn, ETHERNET_IRQHandler, NONE);
+#endif
+
+
+

board/stm32f407-st-discovery/third_party_driver/ethernet/ethernetif.c

@@ -0,0 +1,445 @@
+/**
+ * @file
+ * Ethernet Interface Skeleton
+ *
+ */
+
+/*
+ * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ */
+
+/*
+ * This file is a skeleton for developing Ethernet network interface
+ * drivers for lwIP. Add code to the low_level functions and do a
+ * search-and-replace for the word "ethernetif" to replace it with
+ * something that better describes your network interface.
+ */
+
+#include "lwip/opt.h"
+#include "lwip/def.h"
+#include "lwip/mem.h"
+#include "lwip/pbuf.h"
+#include "lwip/sys.h"
+#include "netif/etharp.h"
+#include "err.h"
+#include "ethernetif.h"
+
+#include "main.h"
+#include <string.h>
+#include <hardware_eth.h>
+#include <xs_sem.h>
+#include <xs_ktask.h>
+#include <priv/tcp_priv.h>
+
+#define netifMTU                                (1500)
+#define netifINTERFACE_TASK_STACK_SIZE		( 2048 )
+#define netifINTERFACE_TASK_PRIORITY		( configMAX_PRIORITIES - 1 )
+#define netifGUARD_BLOCK_TIME			( 250 )
+/* The time to block waiting for input. */
+#define emacBLOCK_TIME_WAITING_FOR_INPUT	( ( portTickType ) 100 )
+
+/* Define those to better describe your network interface. */
+#define IFNAME0 's'
+#define IFNAME1 't'
+
+/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
+#define MAC_ADDR0   2
+#define MAC_ADDR1   0
+#define MAC_ADDR2   0
+#define MAC_ADDR3   0
+#define MAC_ADDR4   0
+#define MAC_ADDR5   0
+
+static struct netif *s_pxNetIf = NULL;
+int32 s_xSemaphore = -1; 
+          
+
+/* Ethernet Rx & Tx DMA Descriptors */
+extern ETH_DMADESCTypeDef  DMARxDscrTab[ETH_RXBUFNB], DMATxDscrTab[ETH_TXBUFNB];
+
+/* Ethernet Receive buffers  */
+extern uint8_t Rx_Buff[ETH_RXBUFNB][ETH_RX_BUF_SIZE]; 
+
+/* Ethernet Transmit buffers */
+extern uint8_t Tx_Buff[ETH_TXBUFNB][ETH_TX_BUF_SIZE]; 
+
+/* Global pointers to track current transmit and receive descriptors */
+extern ETH_DMADESCTypeDef  *DMATxDescToSet;
+extern ETH_DMADESCTypeDef  *DMARxDescToGet;
+
+/* Global pointer for last received frame infos */
+extern ETH_DMA_Rx_Frame_infos *DMA_RX_FRAME_infos;
+
+
+
+
+void ethernetif_input( void * pvParameters );
+void LoopGetMacPkg(void * pvParameters);
+
+static void arp_timer(void *arg);
+
+
+
+uint32_t TCPTimer = 0;
+uint32_t ARPTimer = 0;
+__IO uint32_t LocalTime = 0; /* this variable is used to create a time reference incremented by 10ms */
+
+void LwIP_Periodic_Handle(__IO uint32_t localtime)
+{
+#if LWIP_TCP
+  /* TCP periodic process every 250 ms */
+  if (localtime - TCPTimer >= TCP_TMR_INTERVAL)
+  {
+    TCPTimer =  localtime;
+    tcp_tmr();
+  }
+#endif
+  
+  /* ARP periodic process every 5s */
+  if ((localtime - ARPTimer) >= ARP_TMR_INTERVAL)
+  {
+    ARPTimer =  localtime;
+    etharp_tmr();
+  }
+
+}
+
+void LwIP_Pkt_Handle(struct netif *netif)
+{
+  /* Read a received packet from the Ethernet buffers and send it to the lwIP for handling */
+  ethernetif_input(netif);
+}
+
+void Time_Update_LwIP(void)
+{
+  LocalTime += MS_PER_SYSTICK_F407;
+}
+
+
+
+/**
+ * In this function, the hardware should be initialized.
+ * Called from ethernetif_init().
+ *
+ * @param netif the already initialized lwip network interface structure
+ *        for this ethernetif
+ */
+static void low_level_init(struct netif *netif)
+{
+  uint32_t i;
+ 
+  /* set netif MAC hardware address length */
+  netif->hwaddr_len = ETHARP_HWADDR_LEN;
+	
+  /* set netif MAC hardware address */
+  netif->hwaddr[0] =  MAC_ADDR0;
+  netif->hwaddr[1] =  MAC_ADDR1;
+  netif->hwaddr[2] =  MAC_ADDR2;
+  netif->hwaddr[3] =  MAC_ADDR3;
+  netif->hwaddr[4] =  MAC_ADDR4;
+  netif->hwaddr[5] =  MAC_ADDR5;
+  
+  /* set netif maximum transfer unit */
+  netif->mtu = 1500;
+
+  /* Accept broadcast address and ARP traffic */
+  netif->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP | NETIF_FLAG_LINK_UP;
+  
+  s_pxNetIf =netif;
+ 
+  /* create binary semaphore used for informing ethernetif of frame reception */
+  if (s_xSemaphore < 0)
+  {
+    s_xSemaphore = KSemaphoreCreate(0);
+  }
+
+  /* initialize MAC address in ethernet MAC */ 
+  ETH_MACAddressConfig(ETH_MAC_Address0, netif->hwaddr); 
+  
+  /* Initialize Tx Descriptors list: Chain Mode */
+  ETH_DMATxDescChainInit(DMATxDscrTab, &Tx_Buff[0][0], ETH_TXBUFNB);
+  /* Initialize Rx Descriptors list: Chain Mode  */
+  ETH_DMARxDescChainInit(DMARxDscrTab, &Rx_Buff[0][0], ETH_RXBUFNB);
+
+    /* Enable MAC and DMA transmission and reception */
+  ETH_Start();   
+  
+  /* Enable Ethernet Rx interrrupt */
+  { 
+    for(i=0; i<ETH_RXBUFNB; i++)
+    {
+      ETH_DMARxDescReceiveITConfig(&DMARxDscrTab[i], ENABLE);
+    }
+  }
+
+#ifdef CHECKSUM_BY_HARDWARE
+  /* Enable the checksum insertion for the Tx frames */
+  {
+    for(i=0; i<ETH_TXBUFNB; i++)
+    {
+      ETH_DMATxDescChecksumInsertionConfig(&DMATxDscrTab[i], ETH_DMATxDesc_ChecksumTCPUDPICMPFull);
+    }
+  } 
+#endif
+  
+  /* create the task that handles the ETH_MAC */  
+    uint32 thr_id = KTaskCreate((signed char*) "Eth_if",
+	  						ethernetif_input,
+	  						NULL,
+  							netifINTERFACE_TASK_STACK_SIZE,
+  							15);
+    if (thr_id >= 0)
+    {
+      StartupKTask(thr_id);
+    }
+    else
+    {
+      KPrintf("Eth create failed !");
+    }
+}
+
+
+/**
+ * This function should do the actual transmission of the packet. The packet is
+ * contained in the pbuf that is passed to the function. This pbuf
+ * might be chained.
+ *
+ * @param netif the lwip network interface structure for this ethernetif
+ * @param p the MAC packet to send (e.g. IP packet including MAC addresses and type)
+ * @return ERR_OK if the packet could be sent
+ *         an err_t value if the packet couldn't be sent
+ *
+ * @note Returning ERR_MEM here if a DMA queue of your MAC is full can lead to
+ *       strange results. You might consider waiting for space in the DMA queue
+ *       to become availale since the stack doesn't retry to send a packet
+ *       dropped because of memory failure (except for the TCP timers).
+ */
+
+static err_t low_level_output(struct netif *netif, struct pbuf *p)
+{
+  static int32 sem = -1;
+  struct pbuf *q;
+  uint32_t l = 0;
+  u8 *buffer ;
+  
+	if(sem < 0)
+  {
+    sem = KSemaphoreCreate(1);
+  }
+  
+  KSemaphoreObtain(sem, WAITING_FOREVER);
+
+
+  buffer =  (u8 *)(DMATxDescToSet->Buffer1Addr);
+  for(q = p; q != NULL; q = q->next) 
+  {
+    memcpy((u8_t*)&buffer[l], q->payload, q->len);
+    l = l + q->len;
+  }
+  ETH_Prepare_Transmit_Descriptors(l);
+
+  KSemaphoreAbandon(sem);
+
+  return ERR_OK;
+}
+
+
+	
+  	
+
+/**
+ * Should allocate a pbuf and transfer the bytes of the incoming
+ * packet from the interface into the pbuf.
+ *
+ * @param netif the lwip network interface structure for this ethernetif
+ * @return a pbuf filled with the received packet (including MAC header)
+ *         NULL on memory error
+ */
+static struct pbuf * low_level_input(struct netif *netif)
+{
+  struct pbuf *p, *q;
+  u16_t len;
+  uint32_t l=0,i =0;
+  FrameTypeDef frame;
+  u8 *buffer;
+  __IO ETH_DMADESCTypeDef *DMARxNextDesc;
+  
+  p = NULL;
+  
+  /* Get received frame */
+  frame = ETH_Get_Received_Frame_interrupt();
+  
+  /* check that frame has no error */
+  if ((frame.descriptor->Status & ETH_DMARxDesc_ES) == (uint32_t)RESET)
+  {
+    
+    /* Obtain the size of the packet and put it into the "len" variable. */
+    len = frame.length;
+    buffer = (u8 *)frame.buffer;
+
+    /* We allocate a pbuf chain of pbufs from the pool. */
+    p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL);
+
+    /* Copy received frame from ethernet driver buffer to stack buffer */
+    if (p != NULL)
+    { 
+      for (q = p; q != NULL; q = q->next)
+      {
+        memcpy((u8_t*)q->payload, (u8_t*)&buffer[l], q->len);
+        l = l + q->len;
+      } 
+    }
+  }
+  
+  /* Release descriptors to DMA */
+  /* Check if received frame with multiple DMA buffer segments */
+  if (DMA_RX_FRAME_infos->Seg_Count > 1)
+  {
+    DMARxNextDesc = DMA_RX_FRAME_infos->FS_Rx_Desc;
+  }
+  else
+  {
+    DMARxNextDesc = frame.descriptor;
+  }
+  
+  /* Set Own bit in Rx descriptors: gives the buffers back to DMA */
+  for (i=0; i<DMA_RX_FRAME_infos->Seg_Count; i++)
+  {  
+    DMARxNextDesc->Status = ETH_DMARxDesc_OWN;
+    DMARxNextDesc = (ETH_DMADESCTypeDef *)(DMARxNextDesc->Buffer2NextDescAddr);
+  }
+  
+  /* Clear Segment_Count */
+  DMA_RX_FRAME_infos->Seg_Count =0;
+  
+  
+  /* When Rx Buffer unavailable flag is set: clear it and resume reception */
+  if ((ETH->DMASR & ETH_DMASR_RBUS) != (u32)RESET)  
+  {
+    /* Clear RBUS ETHERNET DMA flag */
+    ETH->DMASR = ETH_DMASR_RBUS;
+      
+    /* Resume DMA reception */
+    ETH->DMARPDR = 0;
+  }
+  return p;
+}
+
+
+/**
+ * This function is the ethernetif_input task, it is processed when a packet 
+ * is ready to be read from the interface. It uses the function low_level_input() 
+ * that should handle the actual reception of bytes from the network
+ * interface. Then the type of the received packet is determined and
+ * the appropriate input function is called.
+ *
+ * @param netif the lwip network interface structure for this ethernetif
+ */
+void ethernetif_input( void * pvParameters )
+{
+  struct pbuf *p;
+  
+  for( ;; )
+  {
+    if (KSemaphoreObtain( s_xSemaphore, WAITING_FOREVER)==EOK)
+    {
+      p = low_level_input( s_pxNetIf );
+
+      if (ERR_OK != s_pxNetIf->input( p, s_pxNetIf))
+      {
+        KPrintf("netif input return not OK ! \n");
+        pbuf_free(p);
+        p=NULL;
+      }
+    }
+  }
+}  
+
+void LoopGetMacPkg(void * pvParameters)
+{
+  // Loop Get MAX Pkg
+  struct netif *netif = (struct netif *)pvParameters;
+  while (1)
+  {  
+    /* check if any packet received */
+    if (ETH_CheckFrameReceived())
+    { 
+      KPrintf("ETH_CheckFrameReceived invoke !\n");
+      /* process received ethernet packet */
+      LwIP_Pkt_Handle(netif);
+    }
+    /* handle periodic timers for LwIP */
+    LwIP_Periodic_Handle(LocalTime);
+  }   
+}
+
+/**
+ * Should be called at the beginning of the program to set up the
+ * network interface. It calls the function low_level_init() to do the
+ * actual setup of the hardware.
+ *
+ * This function should be passed as a parameter to netif_add().
+ *
+ * @param netif the lwip network interface structure for this ethernetif
+ * @return ERR_OK if the loopif is initialized
+ *         ERR_MEM if private data couldn't be allocated
+ *         any other err_t on error
+ */
+err_t ethernetif_init(struct netif *netif)
+{
+  LWIP_ASSERT("netif != NULL", (netif != NULL));
+
+#if LWIP_NETIF_HOSTNAME
+  /* Initialize interface hostname */
+  netif->hostname = "lwip";
+#endif /* LWIP_NETIF_HOSTNAME */
+
+  netif->name[0] = IFNAME0;
+  netif->name[1] = IFNAME1;
+
+  netif->output = etharp_output;
+  netif->linkoutput = low_level_output;
+
+  /* initialize the hardware */
+  low_level_init(netif);
+  
+  etharp_init();
+  sys_timeout(ARP_TMR_INTERVAL, arp_timer, NULL);
+
+  return ERR_OK;
+}
+
+
+static void arp_timer(void *arg)
+{
+  etharp_tmr();
+  sys_timeout(ARP_TMR_INTERVAL, arp_timer, NULL);
+}

board/stm32f407-st-discovery/third_party_driver/include/connect_ethernet.h

@@ -0,0 +1,112 @@
+/**
+  ******************************************************************************
+  * @file    connect_ethernet.h
+  * @author  MCD Application Team
+  * @version V1.0.0
+  * @date    31-October-2011 
+  * @brief   STM32F4x7 Ethernet hardware configuration.
+  ******************************************************************************
+  * @attention
+  *
+  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
+  ******************************************************************************
+  */
+
+ /*
+* Copyright (c) 2020 AIIT XUOS Lab
+* XiUOS is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*        http://license.coscl.org.cn/MulanPSL2
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+* See the Mulan PSL v2 for more details.
+*/
+
+/**
+* @file connect_ethernet.h
+* @brief Adapted network software protocol stack and hardware operation functions
+* @version 1.0 
+* @author AIIT XUOS Lab
+* @date 2021-05-29
+*/
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F4x7_ETH_BSP_H
+#define __STM32F4x7_ETH_BSP_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+
+
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+#define DP83848_PHY_ADDRESS                     0x01 /* Relative to STM324xG-EVAL Board */
+
+/* Specific defines for EXTI line, used to manage Ethernet link status */
+#define ETH_LINK_EXTI_LINE                            EXTI_Line14
+#define ETH_LINK_EXTI_PORT_SOURCE      EXTI_PortSourceGPIOB
+#define ETH_LINK_EXTI_PIN_SOURCE          EXTI_PinSource14
+#define ETH_LINK_EXTI_IRQn                           EXTI15_10_IRQn 
+/* PB14 */
+#define ETH_LINK_PIN                              GPIO_Pin_14
+#define ETH_LINK_GPIO_PORT             GPIOB
+#define ETH_LINK_GPIO_CLK                 RCC_AHB1Periph_GPIOB
+/* PHY registers */
+#define PHY_MICR                                         0x11 /* MII Interrupt Control Register */
+#define PHY_MICR_INT_EN                     ((unsigned short)0x0002) /* PHY Enable interrupts */
+#define PHY_MICR_INT_OE                      ((unsigned short)0x0001) /* PHY Enable output interrupt events */
+#define PHY_MISR                                         0x12 /* MII Interrupt Status and Misc. Control Register */
+#define PHY_MISR_LINK_INT_EN         ((unsigned short)0x0020) /* Enable Interrupt on change of link status */
+#define PHY_LINK_STATUS                      ((unsigned short)0x2000) /* PHY link status interrupt mask */
+
+
+
+
+#define RMII_MODE  // User have to provide the 50 MHz clock by soldering a 50 MHz
+                     // oscillator (ref SM7745HEV-50.0M or equivalent) on the U3
+                     // footprint located under CN3 and also removing jumper on JP5. 
+                     // This oscillator is not provided with the board. 
+                     // For more details, please refer to STM3240G-EVAL evaluation
+                     // board User manual (UM1461).
+
+                                     
+//#define MII_MODE
+
+/* Uncomment the define below to clock the PHY from external 25MHz crystal (only for MII mode) */
+#ifdef 	MII_MODE
+ #define PHY_CLOCK_MCO
+#endif
+
+
+
+
+
+
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+void  ETH_BSP_Config(void);
+uint32_t Eth_Link_PHYITConfig(uint16_t PHYAddress);
+void Eth_Link_EXTIConfig(void);
+void Eth_Link_ITHandler(unsigned short PHYAddress);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F4x7_ETH_BSP_H */
+
+
+/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/

board/stm32f407-st-discovery/third_party_driver/include/hardware_eth_conf.h

@@ -0,0 +1,91 @@
+/**
+  ******************************************************************************
+  * @file    hardware_eth_conf.h
+  * @author  MCD Application Team
+  * @version V1.0.0
+  * @date    31-October-2011
+  * @brief   Configuration file for the STM32F4x7 Ethernet driver.  
+  ******************************************************************************
+  * @attention
+  *
+  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F4x7_ETH_CONF_H
+#define __STM32F4x7_ETH_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include <stm32f4xx.h>
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* Uncomment the line below when using time stamping and/or IPv4 checksum offload */
+#define USE_ENHANCED_DMA_DESCRIPTORS
+
+/* Uncomment the line below if you want to use user defined Delay function
+   (for precise timing), otherwise default _eth_delay_ function defined within
+   the Ethernet driver is used (less precise timing) */
+//#define USE_Delay
+
+#ifdef USE_Delay
+  #include "main.h"                /* Header file where the Delay function prototype is exported */  
+  #define _eth_delay_    Delay     /* User can provide more timing precise _eth_delay_ function */
+#else
+  #define _eth_delay_    ETH_Delay /* Default _eth_delay_ function with less precise timing */
+#endif
+
+
+/* Uncomment the line below to allow custom configuration of the Ethernet driver buffers */    
+#define CUSTOM_DRIVER_BUFFERS_CONFIG   
+
+#ifdef  CUSTOM_DRIVER_BUFFERS_CONFIG
+/* Redefinition of the Ethernet driver buffers size and count */   
+ #define ETH_RX_BUF_SIZE    ETH_MAX_PACKET_SIZE /* buffer size for receive */
+ #define ETH_TX_BUF_SIZE    ETH_MAX_PACKET_SIZE /* buffer size for transmit */
+ #define ETH_RXBUFNB        4                   /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
+ #define ETH_TXBUFNB        2                   /* 2  Tx buffers of size ETH_TX_BUF_SIZE */
+#endif
+
+
+/* PHY configuration section **************************************************/
+/* PHY Reset delay */ 
+#define PHY_RESET_DELAY    ((uint32_t)0x000FFFFF) 
+/* PHY Configuration delay */ 
+#define PHY_CONFIG_DELAY   ((uint32_t)0x00FFFFFF)
+
+/* The PHY status register value change from a PHY to another, so the user have 
+   to update this value depending on the used external PHY */
+#define PHY_SR    ((uint16_t)16) /* Value for DP83848 PHY */
+
+/* The Speed and Duplex mask values change from a PHY to another, so the user
+   have to update this value depending on the used external PHY */
+#define PHY_SPEED_STATUS            ((uint16_t)0x0002) /* Value for DP83848 PHY */
+#define PHY_DUPLEX_STATUS           ((uint16_t)0x0004) /* Value for DP83848 PHY */
+
+   
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */  
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F4x7_ETH_CONF_H */
+
+
+/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
+

kernel/thread/ktask.c

@@ -236,12 +236,12 @@ x_err_t _MdelayKTask(KTaskDescriptorType task, uint32 ms)
  */
 x_err_t _KTaskPrioSet(KTaskDescriptorType task, uint8 prio)
 {
+     extern long ShowTask(void);
     x_base lock = 0;
     int ret = EOK;
     uint8 task_stat = 0;
 
     NULL_PARAM_CHECK(task);
-
     lock = CriticalAreaLock();
    
     if (0 == strncmp("ktaskidle",task->task_base_info.name, strlen("ktaskidle"))) 
@@ -269,11 +269,11 @@ x_err_t _KTaskPrioSet(KTaskDescriptorType task, uint8 prio)
         case KTASK_INIT:
         case KTASK_SUSPEND:
         case KTASK_RUNNING:
-             task->task_dync_sched_member.cur_prio = prio;
-            __BitmapSiteMask(task);
-            break;
+             task->task_dync_sched_member.cur_prio = prio; KTaskDescriptorType tid;
         case KTASK_CLOSE:
+            ShowTask();
             KPrintf("the close stat task is forbidden to change priority.\n");
+
             ret = -ERROR;
             break;
         default:

kernel/thread/tick.c

@@ -23,6 +23,8 @@
 #include <xs_spinlock.h>
 #include <xs_delay.h>
 
+extern void Time_Update_LwIP(void);
+
 #ifdef ARCH_SMP
 static x_ticks_t heartbeat_ticks[CPU_NUMBERS] = {0};
 #else
@@ -78,6 +80,10 @@ void TickAndTaskTimesliceUpdate(void)
 #ifdef KERNEL_SOFTTIMER
     CheckTimerList();
 #endif
+#ifdef BSP_USING_LWIP
+    Time_Update_LwIP();
+#endif
+
 }
 
 /**

path_kernel.mk

@@ -33,6 +33,15 @@ KERNELPATHS :=-I$(BSP_ROOT) \
 	-I$(BSP_ROOT)/third_party_driver/include \
 	-I$(BSP_ROOT)/third_party_driver/usb/STM32_USB_OTG_Driver/inc \
 	-I$(KERNEL_ROOT)/include \
+	-I$(KERNEL_ROOT)/resources/ethernet/LwIP \
+	-I$(KERNEL_ROOT)/resources/ethernet/LwIP/include \
+	-I$(KERNEL_ROOT)/resources/ethernet/LwIP/include/compat \
+	-I$(KERNEL_ROOT)/resources/ethernet/LwIP/include/lwip \
+	-I$(KERNEL_ROOT)/resources/ethernet/LwIP/include/netif \
+	-I$(KERNEL_ROOT)/resources/ethernet/LwIP/include/lwip/apps \
+	-I$(KERNEL_ROOT)/resources/ethernet/LwIP/include/lwip/priv \
+	-I$(KERNEL_ROOT)/resources/ethernet/LwIP/include/lwip/prot \
+	-I$(KERNEL_ROOT)/resources/ethernet/LwIP/arch \
 	-I$(BSP_ROOT)/include #
 endif
 

resources/Kconfig

@@ -141,6 +141,12 @@ if BSP_USING_USB
     endif
 endif
 
+if BSP_USING_LWIP
+    config RESOURCES_LWIP
+        bool "Using LwIP bus drivers"
+        default n
+endif
+
 if BSP_USING_WDT
     config RESOURCES_WDT
         bool "Using Watch Dog bus drivers"

resources/Makefile

@@ -49,6 +49,10 @@ ifeq ($(CONFIG_RESOURCES_USB),y)
 	SRC_DIR += usb
 endif
 
+ifeq ($(CONFIG_RESOURCES_LWIP),y)
+	SRC_DIR += ethernet
+endif
+
 ifeq ($(CONFIG_RESOURCES_WDT),y)
 	SRC_DIR += watchdog
 endif

resources/ethernet/LwIP/FILES

@@ -0,0 +1,15 @@
+api/      - The code for the high-level wrapper API. Not needed if
+            you use the lowel-level call-back/raw API.
+
+apps/     - Higher layer applications that are specifically programmed
+            with the lwIP low-level raw API.
+
+core/     - The core of the TPC/IP stack; protocol implementations,
+            memory and buffer management, and the low-level raw API.
+
+include/  - lwIP include files.
+
+netif/    - Generic network interface device drivers are kept here.
+
+For more information on the various subdirectories, check the FILES
+file in each directory.

resources/ethernet/LwIP/Filelists.cmake

@@ -0,0 +1,279 @@
+# This file is indended to be included in end-user CMakeLists.txt
+# include(/path/to/Filelists.cmake)
+# It assumes the variable LWIP_DIR is defined pointing to the
+# root path of lwIP sources.
+#
+# This file is NOT designed (on purpose) to be used as cmake
+# subdir via add_subdirectory()
+# The intention is to provide greater flexibility to users to 
+# create their own targets using the *_SRCS variables.
+
+set(LWIP_VERSION_MAJOR    "2")
+set(LWIP_VERSION_MINOR    "1")
+set(LWIP_VERSION_REVISION "2")
+# LWIP_VERSION_RC is set to LWIP_RC_RELEASE for official releases
+# LWIP_VERSION_RC is set to LWIP_RC_DEVELOPMENT for Git versions
+# Numbers 1..31 are reserved for release candidates
+set(LWIP_VERSION_RC       "LWIP_RC_RELEASE")
+
+if ("${LWIP_VERSION_RC}" STREQUAL "LWIP_RC_RELEASE")
+    set(LWIP_VERSION_STRING
+        "${LWIP_VERSION_MAJOR}.${LWIP_VERSION_MINOR}.${LWIP_VERSION_REVISION}"
+    )
+elseif ("${LWIP_VERSION_RC}" STREQUAL "LWIP_RC_DEVELOPMENT")
+    set(LWIP_VERSION_STRING
+        "${LWIP_VERSION_MAJOR}.${LWIP_VERSION_MINOR}.${LWIP_VERSION_REVISION}.dev"
+    )
+else ("${LWIP_VERSION_RC}" STREQUAL "LWIP_RC_RELEASE")
+    set(LWIP_VERSION_STRING
+        "${LWIP_VERSION_MAJOR}.${LWIP_VERSION_MINOR}.${LWIP_VERSION_REVISION}.rc${LWIP_VERSION_RC}"
+    )
+endif ("${LWIP_VERSION_RC}" STREQUAL "LWIP_RC_RELEASE")
+
+# The minimum set of files needed for lwIP.
+set(lwipcore_SRCS
+    ${LWIP_DIR}/src/core/init.c
+    ${LWIP_DIR}/src/core/def.c
+    ${LWIP_DIR}/src/core/dns.c
+    ${LWIP_DIR}/src/core/inet_chksum.c
+    ${LWIP_DIR}/src/core/ip.c
+    ${LWIP_DIR}/src/core/mem.c
+    ${LWIP_DIR}/src/core/memp.c
+    ${LWIP_DIR}/src/core/netif.c
+    ${LWIP_DIR}/src/core/pbuf.c
+    ${LWIP_DIR}/src/core/raw.c
+    ${LWIP_DIR}/src/core/stats.c
+    ${LWIP_DIR}/src/core/sys.c
+    ${LWIP_DIR}/src/core/altcp.c
+    ${LWIP_DIR}/src/core/altcp_alloc.c
+    ${LWIP_DIR}/src/core/altcp_tcp.c
+    ${LWIP_DIR}/src/core/tcp.c
+    ${LWIP_DIR}/src/core/tcp_in.c
+    ${LWIP_DIR}/src/core/tcp_out.c
+    ${LWIP_DIR}/src/core/timeouts.c
+    ${LWIP_DIR}/src/core/udp.c
+)
+set(lwipcore4_SRCS
+    ${LWIP_DIR}/src/core/ipv4/autoip.c
+    ${LWIP_DIR}/src/core/ipv4/dhcp.c
+    ${LWIP_DIR}/src/core/ipv4/etharp.c
+    ${LWIP_DIR}/src/core/ipv4/icmp.c
+    ${LWIP_DIR}/src/core/ipv4/igmp.c
+    ${LWIP_DIR}/src/core/ipv4/ip4_frag.c
+    ${LWIP_DIR}/src/core/ipv4/ip4.c
+    ${LWIP_DIR}/src/core/ipv4/ip4_addr.c
+)
+set(lwipcore6_SRCS
+    ${LWIP_DIR}/src/core/ipv6/dhcp6.c
+    ${LWIP_DIR}/src/core/ipv6/ethip6.c
+    ${LWIP_DIR}/src/core/ipv6/icmp6.c
+    ${LWIP_DIR}/src/core/ipv6/inet6.c
+    ${LWIP_DIR}/src/core/ipv6/ip6.c
+    ${LWIP_DIR}/src/core/ipv6/ip6_addr.c
+    ${LWIP_DIR}/src/core/ipv6/ip6_frag.c
+    ${LWIP_DIR}/src/core/ipv6/mld6.c
+    ${LWIP_DIR}/src/core/ipv6/nd6.c
+)
+
+# APIFILES: The files which implement the sequential and socket APIs.
+set(lwipapi_SRCS
+    ${LWIP_DIR}/src/api/api_lib.c
+    ${LWIP_DIR}/src/api/api_msg.c
+    ${LWIP_DIR}/src/api/err.c
+    ${LWIP_DIR}/src/api/if_api.c
+    ${LWIP_DIR}/src/api/netbuf.c
+    ${LWIP_DIR}/src/api/netdb.c
+    ${LWIP_DIR}/src/api/netifapi.c
+    ${LWIP_DIR}/src/api/sockets.c
+    ${LWIP_DIR}/src/api/tcpip.c
+)
+
+# Files implementing various generic network interface functions
+set(lwipnetif_SRCS
+    ${LWIP_DIR}/src/netif/ethernet.c
+    ${LWIP_DIR}/src/netif/bridgeif.c
+    ${LWIP_DIR}/src/netif/bridgeif_fdb.c
+    ${LWIP_DIR}/src/netif/slipif.c
+)
+
+# 6LoWPAN
+set(lwipsixlowpan_SRCS
+    ${LWIP_DIR}/src/netif/lowpan6_common.c
+    ${LWIP_DIR}/src/netif/lowpan6.c
+    ${LWIP_DIR}/src/netif/lowpan6_ble.c
+    ${LWIP_DIR}/src/netif/zepif.c
+)
+
+# PPP
+set(lwipppp_SRCS
+    ${LWIP_DIR}/src/netif/ppp/auth.c
+    ${LWIP_DIR}/src/netif/ppp/ccp.c
+    ${LWIP_DIR}/src/netif/ppp/chap-md5.c
+    ${LWIP_DIR}/src/netif/ppp/chap_ms.c
+    ${LWIP_DIR}/src/netif/ppp/chap-new.c
+    ${LWIP_DIR}/src/netif/ppp/demand.c
+    ${LWIP_DIR}/src/netif/ppp/eap.c
+    ${LWIP_DIR}/src/netif/ppp/ecp.c
+    ${LWIP_DIR}/src/netif/ppp/eui64.c
+    ${LWIP_DIR}/src/netif/ppp/fsm.c
+    ${LWIP_DIR}/src/netif/ppp/ipcp.c
+    ${LWIP_DIR}/src/netif/ppp/ipv6cp.c
+    ${LWIP_DIR}/src/netif/ppp/lcp.c
+    ${LWIP_DIR}/src/netif/ppp/magic.c
+    ${LWIP_DIR}/src/netif/ppp/mppe.c
+    ${LWIP_DIR}/src/netif/ppp/multilink.c
+    ${LWIP_DIR}/src/netif/ppp/ppp.c
+    ${LWIP_DIR}/src/netif/ppp/pppapi.c
+    ${LWIP_DIR}/src/netif/ppp/pppcrypt.c
+    ${LWIP_DIR}/src/netif/ppp/pppoe.c
+    ${LWIP_DIR}/src/netif/ppp/pppol2tp.c
+    ${LWIP_DIR}/src/netif/ppp/pppos.c
+    ${LWIP_DIR}/src/netif/ppp/upap.c
+    ${LWIP_DIR}/src/netif/ppp/utils.c
+    ${LWIP_DIR}/src/netif/ppp/vj.c
+    ${LWIP_DIR}/src/netif/ppp/polarssl/arc4.c
+    ${LWIP_DIR}/src/netif/ppp/polarssl/des.c
+    ${LWIP_DIR}/src/netif/ppp/polarssl/md4.c
+    ${LWIP_DIR}/src/netif/ppp/polarssl/md5.c
+    ${LWIP_DIR}/src/netif/ppp/polarssl/sha1.c
+)
+
+# SNMPv3 agent
+set(lwipsnmp_SRCS
+    ${LWIP_DIR}/src/apps/snmp/snmp_asn1.c
+    ${LWIP_DIR}/src/apps/snmp/snmp_core.c
+    ${LWIP_DIR}/src/apps/snmp/snmp_mib2.c
+    ${LWIP_DIR}/src/apps/snmp/snmp_mib2_icmp.c
+    ${LWIP_DIR}/src/apps/snmp/snmp_mib2_interfaces.c
+    ${LWIP_DIR}/src/apps/snmp/snmp_mib2_ip.c
+    ${LWIP_DIR}/src/apps/snmp/snmp_mib2_snmp.c
+    ${LWIP_DIR}/src/apps/snmp/snmp_mib2_system.c
+    ${LWIP_DIR}/src/apps/snmp/snmp_mib2_tcp.c
+    ${LWIP_DIR}/src/apps/snmp/snmp_mib2_udp.c
+    ${LWIP_DIR}/src/apps/snmp/snmp_snmpv2_framework.c
+    ${LWIP_DIR}/src/apps/snmp/snmp_snmpv2_usm.c
+    ${LWIP_DIR}/src/apps/snmp/snmp_msg.c
+    ${LWIP_DIR}/src/apps/snmp/snmpv3.c
+    ${LWIP_DIR}/src/apps/snmp/snmp_netconn.c
+    ${LWIP_DIR}/src/apps/snmp/snmp_pbuf_stream.c
+    ${LWIP_DIR}/src/apps/snmp/snmp_raw.c
+    ${LWIP_DIR}/src/apps/snmp/snmp_scalar.c
+    ${LWIP_DIR}/src/apps/snmp/snmp_table.c
+    ${LWIP_DIR}/src/apps/snmp/snmp_threadsync.c
+    ${LWIP_DIR}/src/apps/snmp/snmp_traps.c
+)
+
+# HTTP server + client
+set(lwiphttp_SRCS
+    ${LWIP_DIR}/src/apps/http/altcp_proxyconnect.c
+    ${LWIP_DIR}/src/apps/http/fs.c
+    ${LWIP_DIR}/src/apps/http/http_client.c
+    ${LWIP_DIR}/src/apps/http/httpd.c
+)
+
+# MAKEFSDATA HTTP server host utility
+set(lwipmakefsdata_SRCS
+    ${LWIP_DIR}/src/apps/http/makefsdata/makefsdata.c