Browse Source

Ubiquitous/RT_Thread/:add K210 bsp

pull/3/head
chunyexixiaoyu 1 year ago
parent
commit
223933b6f9
  1. 396
      Ubiquitous/RT_Thread/bsp/k210/.config
  2. 36
      Ubiquitous/RT_Thread/bsp/k210/Kconfig
  3. 117
      Ubiquitous/RT_Thread/bsp/k210/README.md
  4. 13
      Ubiquitous/RT_Thread/bsp/k210/SConscript
  5. 64
      Ubiquitous/RT_Thread/bsp/k210/SConstruct
  6. 9
      Ubiquitous/RT_Thread/bsp/k210/applications/SConscript
  7. 41
      Ubiquitous/RT_Thread/bsp/k210/applications/main.c
  8. 188
      Ubiquitous/RT_Thread/bsp/k210/base-drivers/Kconfig
  9. 51
      Ubiquitous/RT_Thread/bsp/k210/base-drivers/SConscript
  10. 167
      Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_dvp.c
  11. 46
      Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_dvp.h
  12. 128
      Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_io_config.c
  13. 36
      Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_io_config.h
  14. 328
      Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_lcd.c
  15. 519
      Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_lcd.h
  16. 96
      Ubiquitous/RT_Thread/bsp/k210/base-drivers/rw007_port.c
  17. 42
      Ubiquitous/RT_Thread/bsp/k210/base-drivers/sdcard_port.c
  18. 7
      Ubiquitous/RT_Thread/bsp/k210/kendryte-sdk/Kconfig
  19. 37
      Ubiquitous/RT_Thread/bsp/k210/kendryte-sdk/SConscript
  20. 170
      Ubiquitous/RT_Thread/bsp/k210/link.lds
  21. 1
      Ubiquitous/RT_Thread/bsp/k210/link_stacksize.lds
  22. 270
      Ubiquitous/RT_Thread/bsp/k210/rtconfig.h
  23. 49
      Ubiquitous/RT_Thread/bsp/k210/rtconfig.py

396
Ubiquitous/RT_Thread/bsp/k210/.config

@ -0,0 +1,396 @@
#
# Automatically generated file; DO NOT EDIT.
# XIUOS Rt-thread Configuration
#
CONFIG_ROOT_DIR="../../../.."
CONFIG_BSP_DIR="."
CONFIG_RT_Thread_DIR="../.."
CONFIG_RTT_DIR="../../rt-thread"
CONFIG_BOARD_K210_EVB=y
#
# RT-Thread Kernel
#
CONFIG_RT_NAME_MAX=8
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
CONFIG_RT_USING_SMP=y
CONFIG_RT_CPUS_NR=2
CONFIG_RT_ALIGN_SIZE=8
# CONFIG_RT_THREAD_PRIORITY_8 is not set
CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=1000
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_USING_IDLE_HOOK=y
CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
CONFIG_IDLE_THREAD_STACK_SIZE=4096
# CONFIG_RT_USING_TIMER_SOFT is not set
#
# kservice optimization
#
# CONFIG_RT_KSERVICE_USING_STDLIB is not set
# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
CONFIG_RT_DEBUG=y
CONFIG_RT_DEBUG_COLOR=y
CONFIG_RT_DEBUG_INIT_CONFIG=y
CONFIG_RT_DEBUG_INIT=1
# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
# CONFIG_RT_DEBUG_IPC_CONFIG is not set
# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
# CONFIG_RT_DEBUG_MEM_CONFIG is not set
# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
#
# Inter-Thread communication
#
CONFIG_RT_USING_SEMAPHORE=y
CONFIG_RT_USING_MUTEX=y
CONFIG_RT_USING_EVENT=y
CONFIG_RT_USING_MAILBOX=y
CONFIG_RT_USING_MESSAGEQUEUE=y
CONFIG_RT_USING_SIGNALS=y
#
# Memory Management
#
CONFIG_RT_USING_MEMPOOL=y
CONFIG_RT_USING_MEMHEAP=y
# CONFIG_RT_USING_NOHEAP is not set
# CONFIG_RT_USING_SMALL_MEM is not set
CONFIG_RT_USING_SLAB=y
# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set
# CONFIG_RT_USING_USERHEAP is not set
# CONFIG_RT_USING_MEMTRACE is not set
CONFIG_RT_USING_HEAP=y
#
# Kernel Device Object
#
CONFIG_RT_USING_DEVICE=y
# CONFIG_RT_USING_DEVICE_OPS is not set
# CONFIG_RT_USING_INTERRUPT_INFO is not set
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uarths"
CONFIG_RT_VER_NUM=0x40004
CONFIG_ARCH_CPU_64BIT=y
# CONFIG_RT_USING_CPU_FFS is not set
CONFIG_ARCH_RISCV=y
CONFIG_ARCH_RISCV_FPU=y
CONFIG_ARCH_RISCV_FPU_S=y
CONFIG_ARCH_RISCV64=y
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
#
# RT-Thread Components
#
CONFIG_RT_USING_COMPONENTS_INIT=y
CONFIG_RT_USING_USER_MAIN=y
CONFIG_RT_MAIN_THREAD_STACK_SIZE=8192
CONFIG_RT_MAIN_THREAD_PRIORITY=10
#
# C++ features
#
# CONFIG_RT_USING_CPLUSPLUS is not set
#
# Command shell
#
CONFIG_RT_USING_FINSH=y
CONFIG_FINSH_THREAD_NAME="tshell"
CONFIG_FINSH_USING_HISTORY=y
CONFIG_FINSH_HISTORY_LINES=5
CONFIG_FINSH_USING_SYMTAB=y
CONFIG_FINSH_USING_DESCRIPTION=y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
CONFIG_FINSH_THREAD_PRIORITY=20
CONFIG_FINSH_THREAD_STACK_SIZE=16384
CONFIG_FINSH_CMD_SIZE=80
# CONFIG_FINSH_USING_AUTH is not set
CONFIG_FINSH_USING_MSH=y
CONFIG_FINSH_USING_MSH_DEFAULT=y
CONFIG_FINSH_USING_MSH_ONLY=y
CONFIG_FINSH_ARG_MAX=10
#
# Device virtual file system
#
CONFIG_RT_USING_DFS=y
CONFIG_DFS_USING_WORKDIR=y
CONFIG_DFS_FILESYSTEMS_MAX=16
CONFIG_DFS_FILESYSTEM_TYPES_MAX=16
CONFIG_DFS_FD_MAX=64
# CONFIG_RT_USING_DFS_MNTTABLE is not set
CONFIG_RT_USING_DFS_ELMFAT=y
#
# elm-chan's FatFs, Generic FAT Filesystem Module
#
CONFIG_RT_DFS_ELM_CODE_PAGE=437
CONFIG_RT_DFS_ELM_WORD_ACCESS=y
# CONFIG_RT_DFS_ELM_USE_LFN_0 is not set
# CONFIG_RT_DFS_ELM_USE_LFN_1 is not set
# CONFIG_RT_DFS_ELM_USE_LFN_2 is not set
CONFIG_RT_DFS_ELM_USE_LFN_3=y
CONFIG_RT_DFS_ELM_USE_LFN=3
CONFIG_RT_DFS_ELM_LFN_UNICODE_0=y
# CONFIG_RT_DFS_ELM_LFN_UNICODE_1 is not set
# CONFIG_RT_DFS_ELM_LFN_UNICODE_2 is not set
# CONFIG_RT_DFS_ELM_LFN_UNICODE_3 is not set
CONFIG_RT_DFS_ELM_LFN_UNICODE=0
CONFIG_RT_DFS_ELM_MAX_LFN=255
CONFIG_RT_DFS_ELM_DRIVES=2
CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=4096
# CONFIG_RT_DFS_ELM_USE_ERASE is not set
CONFIG_RT_DFS_ELM_REENTRANT=y
CONFIG_RT_USING_DFS_DEVFS=y
# CONFIG_RT_USING_DFS_ROMFS is not set
# CONFIG_RT_USING_DFS_RAMFS is not set
# CONFIG_RT_USING_DFS_NFS is not set
#
# Device Drivers
#
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_PIPE_BUFSZ=512
CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
CONFIG_RT_SYSTEM_WORKQUEUE_STACKSIZE=2048
CONFIG_RT_SYSTEM_WORKQUEUE_PRIORITY=23
CONFIG_RT_USING_SERIAL=y
CONFIG_RT_SERIAL_USING_DMA=y
CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_RT_USING_CAN is not set
# CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CPUTIME is not set
# CONFIG_RT_USING_I2C is not set
# CONFIG_RT_USING_PHY is not set
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_ADC is not set
# CONFIG_RT_USING_DAC is not set
# CONFIG_RT_USING_PWM is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_PM is not set
# CONFIG_RT_USING_RTC is not set
# CONFIG_RT_USING_SDIO is not set
CONFIG_RT_USING_SPI=y
# CONFIG_RT_USING_QSPI is not set
CONFIG_RT_USING_SPI_MSD=y
CONFIG_RT_USING_SFUD=y
CONFIG_RT_SFUD_USING_SFDP=y
CONFIG_RT_SFUD_USING_FLASH_INFO_TABLE=y
# CONFIG_RT_SFUD_USING_QSPI is not set
CONFIG_RT_SFUD_SPI_MAX_HZ=50000000
CONFIG_RT_DEBUG_SFUD=y
# CONFIG_RT_USING_ENC28J60 is not set
# CONFIG_RT_USING_SPI_WIFI is not set
# CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_AUDIO is not set
# CONFIG_RT_USING_SENSOR is not set
# CONFIG_RT_USING_TOUCH is not set
# CONFIG_RT_USING_HWCRYPTO is not set
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
CONFIG_RT_USING_WIFI=y
CONFIG_RT_WLAN_DEVICE_STA_NAME="wlan0"
CONFIG_RT_WLAN_DEVICE_AP_NAME="wlan1"
CONFIG_RT_WLAN_SSID_MAX_LENGTH=32
CONFIG_RT_WLAN_PASSWORD_MAX_LENGTH=32
CONFIG_RT_WLAN_DEV_EVENT_NUM=2
CONFIG_RT_WLAN_MANAGE_ENABLE=y
CONFIG_RT_WLAN_SCAN_WAIT_MS=10000
CONFIG_RT_WLAN_CONNECT_WAIT_MS=10000
CONFIG_RT_WLAN_SCAN_SORT=y
CONFIG_RT_WLAN_MSH_CMD_ENABLE=y
CONFIG_RT_WLAN_AUTO_CONNECT_ENABLE=y
CONFIG_AUTO_CONNECTION_PERIOD_MS=2000
CONFIG_RT_WLAN_CFG_ENABLE=y
CONFIG_RT_WLAN_CFG_INFO_MAX=3
CONFIG_RT_WLAN_PROT_ENABLE=y
CONFIG_RT_WLAN_PROT_NAME_LEN=8
CONFIG_RT_WLAN_PROT_MAX=2
CONFIG_RT_WLAN_DEFAULT_PROT="lwip"
CONFIG_RT_WLAN_PROT_LWIP_ENABLE=y
CONFIG_RT_WLAN_PROT_LWIP_NAME="lwip"
# CONFIG_RT_WLAN_PROT_LWIP_PBUF_FORCE is not set
CONFIG_RT_WLAN_WORK_THREAD_ENABLE=y
CONFIG_RT_WLAN_WORKQUEUE_THREAD_NAME="wlan"
CONFIG_RT_WLAN_WORKQUEUE_THREAD_SIZE=2048
CONFIG_RT_WLAN_WORKQUEUE_THREAD_PRIO=15
# CONFIG_RT_WLAN_DEBUG is not set
#
# Using USB
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
#
# POSIX layer and C standard library
#
CONFIG_RT_USING_LIBC=y
# CONFIG_RT_USING_PTHREADS is not set
CONFIG_RT_USING_POSIX=y
# CONFIG_RT_USING_POSIX_MMAP is not set
# CONFIG_RT_USING_POSIX_TERMIOS is not set
# CONFIG_RT_USING_POSIX_GETLINE is not set
# CONFIG_RT_USING_POSIX_AIO is not set
# CONFIG_RT_USING_MODULE is not set
CONFIG_RT_LIBC_FIXED_TIMEZONE=8
#
# Network
#
#
# Socket abstraction layer
#
CONFIG_RT_USING_SAL=y
# CONFIG_SAL_INTERNET_CHECK is not set
#
# protocol stack implement
#
CONFIG_SAL_USING_LWIP=y
# CONFIG_SAL_USING_POSIX is not set
CONFIG_SAL_SOCKETS_NUM=16
#
# Network interface device
#
CONFIG_RT_USING_NETDEV=y
CONFIG_NETDEV_USING_IFCONFIG=y
CONFIG_NETDEV_USING_PING=y
CONFIG_NETDEV_USING_NETSTAT=y
CONFIG_NETDEV_USING_AUTO_DEFAULT=y
# CONFIG_NETDEV_USING_IPV6 is not set
CONFIG_NETDEV_IPV4=1
CONFIG_NETDEV_IPV6=0
# CONFIG_NETDEV_IPV6_SCOPES is not set
#
# light weight TCP/IP stack
#
CONFIG_RT_USING_LWIP=y
# CONFIG_RT_USING_LWIP141 is not set
CONFIG_RT_USING_LWIP202=y
# CONFIG_RT_USING_LWIP212 is not set
# CONFIG_RT_USING_LWIP_IPV6 is not set
CONFIG_RT_LWIP_MEM_ALIGNMENT=8
CONFIG_RT_LWIP_IGMP=y
CONFIG_RT_LWIP_ICMP=y
# CONFIG_RT_LWIP_SNMP is not set
CONFIG_RT_LWIP_DNS=y
CONFIG_RT_LWIP_DHCP=y
CONFIG_IP_SOF_BROADCAST=1
CONFIG_IP_SOF_BROADCAST_RECV=1
#
# Static IPv4 Address
#
CONFIG_RT_LWIP_IPADDR="192.168.1.30"
CONFIG_RT_LWIP_GWADDR="192.168.1.1"
CONFIG_RT_LWIP_MSKADDR="255.255.255.0"
CONFIG_RT_LWIP_UDP=y
CONFIG_RT_LWIP_TCP=y
CONFIG_RT_LWIP_RAW=y
# CONFIG_RT_LWIP_PPP is not set
CONFIG_RT_MEMP_NUM_NETCONN=8
CONFIG_RT_LWIP_PBUF_NUM=16
CONFIG_RT_LWIP_RAW_PCB_NUM=4
CONFIG_RT_LWIP_UDP_PCB_NUM=4
CONFIG_RT_LWIP_TCP_PCB_NUM=4
CONFIG_RT_LWIP_TCP_SEG_NUM=40
CONFIG_RT_LWIP_TCP_SND_BUF=8196
CONFIG_RT_LWIP_TCP_WND=8196
CONFIG_RT_LWIP_TCPTHREAD_PRIORITY=10
CONFIG_RT_LWIP_TCPTHREAD_MBOX_SIZE=8
CONFIG_RT_LWIP_TCPTHREAD_STACKSIZE=10240
# CONFIG_LWIP_NO_RX_THREAD is not set
# CONFIG_LWIP_NO_TX_THREAD is not set
CONFIG_RT_LWIP_ETHTHREAD_PRIORITY=12
CONFIG_RT_LWIP_ETHTHREAD_STACKSIZE=10240
CONFIG_RT_LWIP_ETHTHREAD_MBOX_SIZE=8
# CONFIG_RT_LWIP_REASSEMBLY_FRAG is not set
CONFIG_LWIP_NETIF_STATUS_CALLBACK=1
CONFIG_LWIP_NETIF_LINK_CALLBACK=1
CONFIG_SO_REUSE=1
CONFIG_LWIP_SO_RCVTIMEO=1
CONFIG_LWIP_SO_SNDTIMEO=1
CONFIG_LWIP_SO_RCVBUF=1
CONFIG_LWIP_SO_LINGER=0
# CONFIG_RT_LWIP_NETIF_LOOPBACK is not set
CONFIG_LWIP_NETIF_LOOPBACK=0
# CONFIG_RT_LWIP_STATS is not set
# CONFIG_RT_LWIP_USING_HW_CHECKSUM is not set
CONFIG_RT_LWIP_USING_PING=y
# CONFIG_RT_LWIP_DEBUG is not set
#
# AT commands
#
# CONFIG_RT_USING_AT is not set
# CONFIG_LWIP_USING_DHCPD is not set
#
# VBUS(Virtual Software BUS)
#
# CONFIG_RT_USING_VBUS is not set
#
# Utilities
#
# CONFIG_RT_USING_RYM is not set
# CONFIG_RT_USING_ULOG is not set
# CONFIG_RT_USING_UTEST is not set
# CONFIG_RT_USING_RT_LINK is not set
#
# RT-Thread Utestcases
#
# CONFIG_RT_USING_UTESTCASES is not set
#
# Board Drivers Config
#
CONFIG_BSP_USING_UART_HS=y
CONFIG_BSP_USING_UART1=y
CONFIG_BSP_UART1_TXD_PIN=20
CONFIG_BSP_UART1_RXD_PIN=21
# CONFIG_BSP_USING_UART2 is not set
# CONFIG_BSP_USING_UART3 is not set
# CONFIG_BSP_USING_I2C1 is not set
# CONFIG_BSP_USING_SPI1 is not set
# CONFIG_BSP_USING_LCD is not set
# CONFIG_BSP_USING_SDCARD is not set
CONFIG_BSP_USING_DVP=y
#
# The default pin assignment is based on the Maix Duino K210 development board
#
CONFIG_BSP_DVP_SCCB_SDA_PIN=40
CONFIG_BSP_DVP_SCCB_SCLK_PIN=41
CONFIG_BSP_DVP_CMOS_RST_PIN=42
CONFIG_BSP_DVP_CMOS_VSYNC_PIN=43
CONFIG_BSP_DVP_CMOS_PWDN_PIN=44
CONFIG_BSP_DVP_CMOS_XCLK_PIN=46
CONFIG_BSP_DVP_CMOS_PCLK_PIN=47
CONFIG_BSP_DVP_CMOS_HREF_PIN=45
#
# Kendryte SDK Config
#
CONFIG_PKG_KENDRYTE_SDK_VERNUM=0x0055
#
# More Drivers
#
CONFIG___STACKSIZE__=4096

36
Ubiquitous/RT_Thread/bsp/k210/Kconfig

@ -0,0 +1,36 @@
mainmenu "XIUOS Rt-thread Configuration"
config ROOT_DIR
string
default "../../../.."
config BSP_DIR
string
default "."
config RT_Thread_DIR
string
default "../.."
config RTT_DIR
string
default "../../rt-thread"
config BOARD_K210_EVB
bool
select ARCH_RISCV64
select ARCH_RISCV_FPU_S
select RT_USING_COMPONENTS_INIT
select RT_USING_USER_MAIN
default y
source "$RTT_DIR/Kconfig"
source "base-drivers/Kconfig"
source "kendryte-sdk/Kconfig"
source "$RT_Thread_DIR/drivers/Kconfig"
source "$ROOT_DIR/APP_Framework/Applications/Kconfig"
source "$ROOT_DIR/APP_Framework/Framework/Kconfig"
config __STACKSIZE__
int "stack size for interrupt"
default 4096

117
Ubiquitous/RT_Thread/bsp/k210/README.md

@ -0,0 +1,117 @@
# K210最小系统板(Max bit)说明
## OV2640 menuconfig 配置:
​ More Driver-------->ov2640 driver (勾选) 保存即可
## RW007 menuconfig 配置:
​ More Driver-------->rw007:SPI WIFI rw007 driver
​ example driver port (not use example driver, porting by myself)
​ (20000000) SPI MAX Hz
​ Board Drivers Config
​ Enable SPI1
​ (27) spi1 clk pin number
​ (28) spi1 d0 pin number
​ (26) spi1 d1 pin number
​ SPI1 Enable SS1(spi11 dev)-------->(8) spi1 ss1 pin number
​ (spi11) the SPIDEV rw007 driver on
​ (7) rw007 int pin for rw007
​ (6) rw007 rst pin for rw007
**SPI1 Enable SS1(spi11 dev)表示SPI1总线片选编号1 ,此时挂载在总线上设备名是spi11,所以 the SPIDEV rw007 driver on参数也要填写(spi11)**
## SD卡配置:
​ Board Drivers Config-------->Enable SDCARD (spi1(ss0)) (勾选)保存即可 SPI1 Enable SS0(spi10 dev)-------->(29) spi1 ss1 pin number 会默认配置
**SD卡和RW007共用一条spi硬件总线 ,其中片选设备sd卡为SPI1 Enable SS0(spi10 dev),RW007片选设备为SPI1 Enable SS1(spi11 dev)**
**上述引脚根据电路实际而定,另外涉及到相关的Lwip wifi framwork等已经默认配置并匹配**
## 以下为引脚硬件的连接表
## RW007(SPI1 ) Kendryte Sipeed MAX bit io
| 引脚 | 作用 | 引脚序号 | RW007板子 |
| ------------------ | --------- | -------- | --------- |
| io 27(印丝标注SCK) | SPI1_SCK | | SCK |
| io 26(印丝标注SO) | SPI1_MISO | | MISO |
| io 28(印丝标注SI) | SPI1_MOSI | | MOSI |
| io 8 | CS/BOOT1 | | CS |
| io 7 | INT/BUSY | | D9 |
| io 6 | RESET | | D8 |
## SD卡Kendryte Sipeed MAX bit io
| 引脚 | 作用 | 引脚序号 | RW007板子 |
| ------------------ | --------- | -------- | --------- |
| io 27(印丝标注SCK) | SPI1_SCK | | SCK |
| io 26(印丝标注SO) | SPI1_MISO | | MISO |
| io 28(印丝标注SI) | SPI1_MOSI | | MOSI |
| io 29 | CS/BOOT1 | | CS |
**注意:BSP_SPI1_D0_PIN 10 d0也就是MOSI ,sd卡可直接利用Max bit板载,无需重新接线。SD卡和Rw007设备共用一条SPI1总线**
## 编译说明
编译K210,需要有RT-Thread的代码,因为K210的sdk是以软件包方式,所以需要在bsp/k210下做软件包更新。Windows下推进使用[env工具][1],然后在console下进入bsp/k210目录中,运行:
cd bsp/k210
pkgs --update
如果在Linux平台下,可以先执行
scons --menuconfig
它会自动下载env相关脚本到~/.env目录,然后执行
source ~/.env/env.sh
cd bsp/k210
pkgs --update
下载risc-v的工具链,[下载地址](https://github.com/xpack-dev-tools/riscv-none-embed-gcc-xpack/releases)
更新完软件包后,在`rtconfig.py`中将risc-v工具链的本地路径加入文档。
注:
1. 工具链建议使用上方提供的,`kendryte的官方工具链`会报浮点类型不兼容的错误,`risc-v工具链8.2.0之前的版本`会出现头文件不兼容的问题。
2. 网上传需要开启C++ 17,认为k210的神经网络编译器nncase多数语法由C++ 17,故需要开启C++ 17。个人认为没有必要,nncase是在PC端独立使用的,
作用是将神经网络模型转为kmodel格式,此格式文件为已经编译的二进制文件.
然后执行scons编译:
set RTT_EXEC_PATH=your_toolchains
scons
来编译这个板级支持包。如果编译正确无误,会产生rtthread.elf、rtthread.bin文件。其中rtthread.bin需要烧写到设备中进行运行。
注:如果初次使用编译报错,可能是使用的SDK过老,使用`menuconfig`命令,在→ RT-Thread online packages → peripheral libraries
and drivers → the kendryte-sdk package for rt-thread中将SDK改为latest版本即可。

13
Ubiquitous/RT_Thread/bsp/k210/SConscript

@ -0,0 +1,13 @@
import os
from building import *
cwd = GetCurrentDir()
objs = []
list = os.listdir(cwd)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript'))
Return('objs')

64
Ubiquitous/RT_Thread/bsp/k210/SConstruct

@ -0,0 +1,64 @@
import os
import sys
import rtconfig
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../rt-thread')
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
from building import *
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
DefaultEnvironment(tools=[])
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
# use ASPPCOM to replace ASCOM, ASPPCOM will use CFLAGS/CPPFLAGS with AS
env['ASCOM'] = env['ASPPCOM']
AddOption('--compiledb',
dest = 'compiledb',
action = 'store_true',
default = False,
help = 'generate compile_commands.json')
if GetOption('compiledb'):
if int(SCons.__version__.split('.')[0]) >= 4:
env['COMPILATIONDB_USE_ABSPATH'] = True
env.Tool('compilation_db')
env.CompilationDatabase('compile_commands.json')
else:
print('Warning: --compiledb only support on SCons 4.0+')
Export('RTT_ROOT')
Export('rtconfig')
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu = False)
stack_size = 4096
stack_lds = open('link_stacksize.lds', 'w')
if GetDepend('__STACKSIZE__'): stack_size = GetDepend('__STACKSIZE__')
stack_lds.write('__STACKSIZE__ = %d;' % stack_size)
stack_lds.close()
# include more drivers
objs.extend(SConscript(os.getcwd() + '/../../drivers/SConscript'))
# include APP_Framework/Framework
objs.extend(SConscript(os.getcwd() + '/../../../../APP_Framework/Framework/SConscript'))
# include APP_Framework/Applications
objs.extend(SConscript(os.getcwd() + '/../../../../APP_Framework/Applications/SConscript'))
# make a building
DoBuilding(TARGET, objs)

9
Ubiquitous/RT_Thread/bsp/k210/applications/SConscript

@ -0,0 +1,9 @@
from building import *
cwd = GetCurrentDir()
src = Glob('*.c') + Glob('*.cpp')
CPPPATH = [cwd]
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
Return('group')

41
Ubiquitous/RT_Thread/bsp/k210/applications/main.c

@ -0,0 +1,41 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
#include <rtthread.h>
#include <rtdevice.h>
#include <stdio.h>
#define LED_G 12
int main(void)
{
rt_pin_mode(LED_G, PIN_MODE_OUTPUT);
rt_thread_mdelay(100);
char info1[25] ={0};
char info2[25] ={0};
sprintf(info1,"xuos-intelligence k210 build ");
sprintf(info2,"%s %s",__DATE__,__TIME__);
printf("%s %s \n",info1,info2);
#ifdef BSP_USING_LCD
#include<drv_lcd.h>
lcd_clear(PINK);
lcd_draw_string(70,100,info1,BLACK);
lcd_draw_string(70,120,info2,BLACK);
#endif
while(1)
{
rt_pin_write(LED_G, PIN_HIGH);
rt_thread_mdelay(500);
rt_pin_write(LED_G, PIN_LOW);
rt_thread_mdelay(500);
}
return 0;
}

188
Ubiquitous/RT_Thread/bsp/k210/base-drivers/Kconfig

@ -0,0 +1,188 @@
menu "Board Drivers Config"
config BSP_USING_UART_HS
bool "Enable High Speed UART"
default y
menuconfig BSP_USING_UART1
bool "Enable UART1"
default n
if BSP_USING_UART1
config BSP_UART1_TXD_PIN
int "uart1 TXD pin number"
default 20
config BSP_UART1_RXD_PIN
int "uart1 RXD pin number"
default 21
endif
menuconfig BSP_USING_UART2
bool "Enable UART2"
default n
if BSP_USING_UART2
config BSP_UART2_TXD_PIN
int "uart2 TXD pin number"
default 28
config BSP_UART2_RXD_PIN
int "uart2 RXD pin number"
default 27
endif
menuconfig BSP_USING_UART3
bool "Enable UART3"
default n
if BSP_USING_UART3
config BSP_UART3_TXD_PIN
int "uart3 TXD pin number"
default 22
config BSP_UART3_RXD_PIN
int "uart3 RXD pin number"
default 23
endif
config BSP_USING_I2C1
bool "Enable I2C1 (GPIO0/1)"
select RT_USING_I2C
default n
menuconfig BSP_USING_SPI1
bool "Enable SPI1"
select RT_USING_SPI
default n
if BSP_USING_SPI1
config BSP_USING_SPI1_AS_QSPI
bool
default n
config BSP_SPI1_CLK_PIN
int "spi1 clk pin number"
default 27
config BSP_SPI1_D0_PIN
int "spi1 d0 pin number"
default 28
config BSP_SPI1_D1_PIN
int "spi1 d1 pin number"
default 26
if BSP_USING_SPI1_AS_QSPI
config BSP_SPI1_D2_PIN
int "spi1 d2 pin number"
default 32
config BSP_SPI1_D3_PIN
int "spi1 d3 pin number"
default 33
endif
menuconfig BSP_SPI1_USING_SS0
bool "SPI1 Enable SS0(spi10 dev)"
default n
if BSP_SPI1_USING_SS0
config BSP_SPI1_SS0_PIN
int "spi1 ss0 pin number"
default 29
endif
menuconfig BSP_SPI1_USING_SS1
bool "SPI1 Enable SS1(spi11 dev)"
default n
if BSP_SPI1_USING_SS1
config BSP_SPI1_SS1_PIN
int "spi1 ss1 pin number"
default 8
endif
menuconfig BSP_SPI1_USING_SS2
bool "SPI1 Enable SS2(spi12 dev)"
default n
if BSP_SPI1_USING_SS2
config BSP_SPI1_SS2_PIN
int "spi1 ss2 pin number"
default 26
endif
menuconfig BSP_SPI1_USING_SS3
bool "SPI1 Enable SS3(spi13 dev)"
default n
if BSP_SPI1_USING_SS3
config BSP_SPI1_SS3_PIN
int "spi1 ss3 pin number"
default 27
endif
endif
menuconfig BSP_USING_LCD
bool "Enable LCD on SPI0"
default n
if BSP_USING_LCD
config BSP_LCD_CS_PIN
int "CS pin number of 8080 interface"
default 36
config BSP_LCD_WR_PIN
int "WR pin number of 8080 interface"
default 39
config BSP_LCD_DC_PIN
int "DC pin number of 8080 interface"
default 38
config BSP_LCD_RST_PIN
int "RST pin number of 8080 interface"
default 37
config BSP_LCD_X_MAX
int "LCD Height"
default 240
config BSP_LCD_Y_MAX
int "LCD Width"
default 320
endif
menuconfig BSP_USING_SDCARD
bool "Enable SDCARD (spi1(ss0))"
select BSP_USING_SPI1
select BSP_SPI1_USING_SS0
select RT_USING_DFS
select RT_USING_DFS_ELMFAT
select RT_USING_SPI_MSD
default n
menuconfig BSP_USING_DVP
bool "Enable DVP(camera)"
default n
if BSP_USING_DVP
comment "The default pin assignment is based on the Maix Duino K210 development board"
config BSP_DVP_SCCB_SDA_PIN
int "SCCB SDA pin number for camera"
default 40
config BSP_DVP_SCCB_SCLK_PIN
int "SCCB SCLK pin number for camera"
default 41
config BSP_DVP_CMOS_RST_PIN
int "CMOS RST pin number for camera"
default 42
config BSP_DVP_CMOS_VSYNC_PIN
int "CMOS VSYNC pin number for camera"
default 43
config BSP_DVP_CMOS_PWDN_PIN
int "CMOS PWDN pin number for camera"
default 44
config BSP_DVP_CMOS_XCLK_PIN
int "CMOS XCLK pin number for camera"
default 46
config BSP_DVP_CMOS_PCLK_PIN
int "CMOS PCLK pin number for camera"
default 47
config BSP_DVP_CMOS_HREF_PIN
int "CMOS HREF pin number for camera"
default 45
endif
if PKG_USING_RW007
config RW007_SPIDEV_NAME
string "the SPIDEV rw007 driver on"
default "spi11"
config RW007_INT_BUSY_PIN
int "rw007 int pin for rw007"
default 7
config RW007_RST_PIN
int "rw007 rst pin for rw007"
default 6
endif
endmenu

51
Ubiquitous/RT_Thread/bsp/k210/base-drivers/SConscript

@ -0,0 +1,51 @@
import os
import rtconfig
from building import *
cwd = GetCurrentDir()
drv_path = cwd+"/../../../rt-thread/bsp/k210/driver/"
src = [
drv_path + 'board.c',
drv_path + 'heap.c',
drv_path + 'drv_uart.c',
drv_path + 'drv_interrupt.c',
'drv_io_config.c'
]
CPPPATH = [cwd,drv_path]
if GetDepend('RT_USING_PIN'):
src += [drv_path + 'drv_gpio.c']
if GetDepend('RT_USING_HWTIMER'):
src += [drv_path + 'drv_hw_timer.c']
if GetDepend('RT_USING_CPUTIME'):
src += [drv_path + 'drv_cputime.c']
if GetDepend('RT_USING_I2C'):
src += [drv_path + 'drv_i2c.c']
if GetDepend('RT_USING_SPI'):
src += [drv_path + 'drv_spi.c']
if GetDepend('RT_USING_PWM'):
src += [drv_path + 'drv_pwm.c']
if GetDepend('RT_USING_WDT'):
src += [drv_path + 'drv_wdt.c']
if GetDepend('BSP_USING_SDCARD'):
src += ['sdcard_port.c']
if GetDepend('BSP_USING_DVP'):
src += ['drv_dvp.c']
if GetDepend('BSP_USING_LCD'):
src += ['drv_lcd.c']
if GetDepend('PKG_USING_RW007'):
src += ['rw007_port.c']
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
Return('group')

167
Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_dvp.c

@ -0,0 +1,167 @@
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-01-27 tianchunyu the first version
*/
#include <rtthread.h>
#include <stdio.h>
#ifdef BSP_USING_DVP
#include <drv_dvp.h>
#define DRV_DEBUG
#define LOG_TAG "drv.dvp"
#define DBG_LVL DBG_LOG
#include <rtdbg.h>
static struct kendryte_dvp rt_dvp = {0};
static void (*dvp_irq_callback)(void) = NULL;
/*
the camera starts transfering photos
*/
static int on_irq_dvp(void* ctx)
{
if (dvp_get_interrupt(DVP_STS_FRAME_FINISH))
{
rt_dvp_stop();
dvp_clear_interrupt(DVP_STS_FRAME_FINISH);
(*dvp_irq_callback)();
}
return 0;
}
void rt_dvp_start(uint32_t pData, uint32_t Length)
{
dvp_set_display_addr(pData);
dvp_config_interrupt(DVP_CFG_FINISH_INT_ENABLE, 1);
dvp_start_convert();
}
/*
the camera stops transfering photos
*/
void rt_dvp_stop(void)
{
dvp_config_interrupt(DVP_CFG_FINISH_INT_ENABLE, 0);
}
static rt_err_t rt_dvp_init(rt_device_t dev)
{
//sysctl_pll_set_freq(SYSCTL_PLL2, 45158400UL);
RT_ASSERT(dev != RT_NULL);
rt_err_t result = RT_EOK;
/* Init DVP IO map and function settings io pin serial number depends on schematic diagram
initialize io in io_config_init function*/
/*ov2640 dvp interface initialize*/
dvp_init(8);
dvp_set_xclk_rate(24000000);
dvp_enable_burst();
dvp_set_output_enable(0, 1);
dvp_set_output_enable(1, 1);
dvp_set_image_format(DVP_CFG_RGB_FORMAT);////////////////
dvp_set_image_size(320, 240);
dvp_config_interrupt(DVP_CFG_FINISH_INT_ENABLE, 0);
dvp_disable_auto();
plic_set_priority(IRQN_DVP_INTERRUPT, 1);
plic_irq_register(IRQN_DVP_INTERRUPT, on_irq_dvp, NULL);
plic_irq_enable(IRQN_DVP_INTERRUPT);
dvp_clear_interrupt(DVP_STS_FRAME_FINISH);
LOG_I("dvp initialize success");
return result;
}
static rt_err_t rt_dvp_open(rt_device_t dev, rt_uint16_t oflag)
{
RT_ASSERT(dev != RT_NULL);
return RT_EOK;
}
static rt_err_t rt_dvp_close(rt_device_t dev)
{
RT_ASSERT(dev != RT_NULL);
return RT_EOK;
}
static rt_err_t rt_dvp_control(rt_device_t dev, int cmd, void *args)
{
RT_ASSERT(dev != RT_NULL);
return RT_EOK;
}
static rt_size_t rt_dvp_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
{
RT_ASSERT(dev != RT_NULL);
return RT_EOK;
}
static rt_size_t rt_dvp_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
{
RT_ASSERT(dev != RT_NULL);
return RT_EOK;
}
rt_err_t rt_set_irq_dvp_callback_hander(void (*p)(void))
{
if(NULL == p)
{
LOG_E("set irq dcmi callback hander is NULL");
return RT_ERROR;
}
dvp_irq_callback = p;
return RT_EOK;
}
int kendryte_dvp_init(void)
{
int ret = 0;
rt_device_t dvp_dev = RT_NULL;
rt_dvp.dev.parent.type = RT_Device_Class_Miscellaneous;
rt_dvp.dev.parent.init = rt_dvp_init;
rt_dvp.dev.parent.open = rt_dvp_open;
rt_dvp.dev.parent.close = rt_dvp_close;
rt_dvp.dev.parent.read = rt_dvp_read;
rt_dvp.dev.parent.write = rt_dvp_write;
rt_dvp.dev.parent.control = rt_dvp_control;
rt_dvp.dev.parent.user_data = RT_NULL;
ret = rt_device_register(&rt_dvp.dev.parent, "dvp", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE);
if(ret != RT_EOK)
{
LOG_E("dvp register fail!!\n\r");
return -RT_ERROR;
}
LOG_I("dvp register successfully");
dvp_dev = rt_device_find("dvp");
if (dvp_dev == RT_NULL)
{
LOG_E("can't find dvp device!");
return RT_ERROR;
}
ret = rt_device_open(dvp_dev, RT_DEVICE_FLAG_RDWR);
if(ret != RT_EOK)
{
LOG_E("can't open dvp device!");
return RT_ERROR;
}
LOG_I("dvp open successfully");
return RT_EOK;
}
INIT_BOARD_EXPORT(kendryte_dvp_init);
#endif

46
Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_dvp.h

@ -0,0 +1,46 @@
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-01-27 tianchunyu the first version
*/
#ifndef __DRV_DVP_H__
#define __DRV_DVP_H__
#include <dvp.h>
#include <fpioa.h>
#include <sysctl.h>
#include <plic.h>
#include <sysctl.h>
#ifdef __cplusplus
extern "C" {
#endif
struct rt_dvp_device
{
struct rt_device parent;
};
struct kendryte_dvp
{
struct rt_dvp_device dev;
};
extern void rt_dvp_start(uint32_t pData, uint32_t Length);
extern void rt_dvp_stop(void);
extern rt_err_t rt_set_irq_dvp_callback_hander(void (*p)(void));
#ifdef __cplusplus
}
#endif
#endif

128
Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_io_config.c

@ -0,0 +1,128 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-03-19 ZYH first version
* 2021-01-28 tianchunyu Modify macro definitions
*/
#include <rtthread.h>
#include <fpioa.h>
#include <drv_io_config.h>
#include <sysctl.h>
#define HS_GPIO(n) (FUNC_GPIOHS0 + n)
#define IOCONFIG(pin,func) {pin, func, #func}
static struct io_config
{
int io_num;
fpioa_function_t func;
const char * func_name;
} io_config[] =
{
#ifdef BSP_USING_DVP
IOCONFIG(BSP_DVP_SCCB_SDA_PIN, FUNC_SCCB_SDA),
IOCONFIG(BSP_DVP_SCCB_SCLK_PIN, FUNC_SCCB_SCLK),
IOCONFIG(BSP_DVP_CMOS_RST_PIN, FUNC_CMOS_RST),
IOCONFIG(BSP_DVP_CMOS_VSYNC_PIN, FUNC_CMOS_VSYNC),
IOCONFIG(BSP_DVP_CMOS_PWDN_PIN, FUNC_CMOS_PWDN),
IOCONFIG(BSP_DVP_CMOS_XCLK_PIN, FUNC_CMOS_XCLK),
IOCONFIG(BSP_DVP_CMOS_PCLK_PIN, FUNC_CMOS_PCLK),
IOCONFIG(BSP_DVP_CMOS_HREF_PIN, FUNC_CMOS_HREF),
#endif
#ifdef BSP_USING_LCD
IOCONFIG(BSP_LCD_CS_PIN, FUNC_SPI0_SS3), /* LCD CS PIN */
IOCONFIG(BSP_LCD_WR_PIN, FUNC_SPI0_SCLK), /* LCD WR PIN */
IOCONFIG(BSP_LCD_DC_PIN, FUNC_GPIOHS2), /* LCD DC PIN */
IOCONFIG(BSP_LCD_RST_PIN,FUNC_GPIOHS3), /* LCD DC PIN */
#endif
#ifdef BSP_USING_SPI1
IOCONFIG(BSP_SPI1_CLK_PIN, FUNC_SPI1_SCLK),
IOCONFIG(BSP_SPI1_D0_PIN, FUNC_SPI1_D0),
IOCONFIG(BSP_SPI1_D1_PIN, FUNC_SPI1_D1),
#ifdef BSP_USING_SPI1_AS_QSPI
IOCONFIG(BSP_SPI1_D2_PIN, FUNC_SPI1_D2),
IOCONFIG(BSP_SPI1_D3_PIN, FUNC_SPI1_D3),
#endif
#ifdef BSP_SPI1_USING_SS0
IOCONFIG(BSP_SPI1_SS0_PIN, HS_GPIO(SPI1_CS0_PIN)),
#endif
#ifdef BSP_SPI1_USING_SS1
IOCONFIG(BSP_SPI1_SS1_PIN, HS_GPIO(SPI1_CS1_PIN)),
#endif
#ifdef BSP_SPI1_USING_SS2
IOCONFIG(BSP_SPI1_SS2_PIN, HS_GPIO(SPI1_CS2_PIN)),
#endif
#ifdef BSP_SPI1_USING_SS3
IOCONFIG(BSP_SPI1_SS3_PIN, HS_GPIO(SPI1_CS3_PIN)),
#endif
#endif
#ifdef BSP_USING_UART1
IOCONFIG(BSP_UART1_TXD_PIN, FUNC_UART1_TX),
IOCONFIG(BSP_UART1_RXD_PIN, FUNC_UART1_RX),
#endif
#ifdef BSP_USING_UART2
IOCONFIG(BSP_UART2_TXD_PIN, FUNC_UART2_TX),
IOCONFIG(BSP_UART2_RXD_PIN, FUNC_UART2_RX),
#endif
#ifdef BSP_USING_UART3
IOCONFIG(BSP_UART3_TXD_PIN, FUNC_UART3_TX),
IOCONFIG(BSP_UART3_RXD_PIN, FUNC_UART3_RX),
#endif
};
static int print_io_config()
{
int i;
rt_kprintf("IO Configuration Table\n");
rt_kprintf("┌───────┬────────────────────────┐\n");
rt_kprintf("│Pin │Function │\n");
rt_kprintf("├───────┼────────────────────────┤\n");
for(i = 0; i < sizeof io_config / sizeof io_config[0]; i++)
{
rt_kprintf("│%-2d │%-24.24s│\n", io_config[i].io_num, io_config[i].func_name);
}
rt_kprintf("└───────┴────────────────────────┘\n");
return 0;
}
MSH_CMD_EXPORT_ALIAS(print_io_config, io, print io config);
int io_config_init(void)
{
int count = sizeof(io_config) / sizeof(io_config[0]);
int i;
sysctl_set_power_mode(SYSCTL_POWER_BANK0, SYSCTL_POWER_V18);
sysctl_set_power_mode(SYSCTL_POWER_BANK1, SYSCTL_POWER_V18);
sysctl_set_power_mode(SYSCTL_POWER_BANK2, SYSCTL_POWER_V18);
#ifdef BSP_USING_UART2
// for IO-27/28
sysctl_set_power_mode(SYSCTL_POWER_BANK4, SYSCTL_POWER_V33);
#endif
#if defined(BSP_USING_UART1) || defined(BSP_USING_UART3)
// for IO-20~23
sysctl_set_power_mode(SYSCTL_POWER_BANK3, SYSCTL_POWER_V33);
#endif
for(i = 0; i < count; i++)
{
fpioa_set_function(io_config[i].io_num, io_config[i].func);
}
#if defined(BSP_USING_DVP) || defined(BSP_USING_LCD)
sysctl_set_spi0_dvp_data(1);
sysctl_set_power_mode(SYSCTL_POWER_BANK6, SYSCTL_POWER_V18);
sysctl_set_power_mode(SYSCTL_POWER_BANK7, SYSCTL_POWER_V18);
#endif
}
INIT_BOARD_EXPORT(io_config_init);

36
Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_io_config.h

@ -0,0 +1,36 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-03-19 ZYH first version
*/
#ifndef __DRV_IO_CONFIG_H__
#define __DRV_IO_CONFIG_H__
enum HS_GPIO_CONFIG
{
#ifdef BSP_USING_LCD
LCD_DC_PIN = 0, /* LCD DC PIN */
#endif
#ifdef BSP_SPI1_USING_SS0
SPI1_CS0_PIN,
#endif
#ifdef BSP_SPI1_USING_SS1
SPI1_CS1_PIN,
#endif
#ifdef BSP_SPI1_USING_SS2
SPI1_CS2_PIN,
#endif
#ifdef BSP_SPI1_USING_SS3
SPI1_CS3_PIN,
#endif
GPIO_ALLOC_START /* index of gpio driver start */
};
extern int io_config_init(void);
#endif

328
Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_lcd.c

@ -0,0 +1,328 @@
/* Copyright 2018 Canaan Inc.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include <rtthread.h>
#ifdef BSP_USING_LCD
#include <drv_lcd.h>
#include <gpiohs.h>
#include <spi.h>
#include <unistd.h>
#include <string.h>
#include <fpioa.h>
#define DBG_TAG "LCD"
#define DBG_LVL DBG_LOG
#include <rtdbg.h>
static lcd_ctl_t lcd_ctl;
static void init_dcx(void)
{
gpiohs_set_drive_mode(DCX_GPIONUM, GPIO_DM_OUTPUT);
gpiohs_set_pin(DCX_GPIONUM, GPIO_PV_HIGH);
}
static void set_dcx_control(void)
{
gpiohs_set_pin(DCX_GPIONUM, GPIO_PV_LOW);
}
static void set_dcx_data(void)
{
gpiohs_set_pin(DCX_GPIONUM, GPIO_PV_HIGH);
}
static void init_rst(void)
{
gpiohs_set_drive_mode(RST_GPIONUM, GPIO_DM_OUTPUT);
gpiohs_set_pin(RST_GPIONUM, GPIO_PV_LOW);
usleep(100000);
gpiohs_set_pin(RST_GPIONUM, GPIO_PV_HIGH);
usleep(100000);
}
void tft_hard_init(void)
{
init_dcx();
spi_init(SPI_CHANNEL, SPI_WORK_MODE_0, SPI_FF_OCTAL, 8, 0);
init_rst();
spi_set_clk_rate(SPI_CHANNEL, 20000000);
}
void tft_write_command(uint8_t cmd)
{
set_dcx_control();
spi_init(SPI_CHANNEL, SPI_WORK_MODE_0, SPI_FF_OCTAL, 8, 0);
spi_init_non_standard(SPI_CHANNEL, 8/*instrction length*/, 0/*address length*/, 0/*wait cycles*/,
SPI_AITM_AS_FRAME_FORMAT/*spi address trans mode*/);
spi_send_data_normal_dma(DMAC_CHANNEL0, SPI_CHANNEL, SPI_SLAVE_SELECT, (uint8_t *)(&cmd), 1,SPI_TRANS_CHAR);
}
void tft_write_byte(uint8_t *data_buf, uint32_t length)
{
set_dcx_data();
spi_init(SPI_CHANNEL, SPI_WORK_MODE_0, SPI_FF_OCTAL, 8, 0);
spi_init_non_standard(SPI_CHANNEL, 8/*instrction length*/, 0/*address length*/, 0/*wait cycles*/,
SPI_AITM_AS_FRAME_FORMAT/*spi address trans mode*/);
spi_send_data_normal_dma(DMAC_CHANNEL0, SPI_CHANNEL, SPI_SLAVE_SELECT, data_buf, length, SPI_TRANS_CHAR);
}
void tft_write_half(uint16_t *data_buf, uint32_t length)
{
set_dcx_data();
spi_init(SPI_CHANNEL, SPI_WORK_MODE_0, SPI_FF_OCTAL, 16, 0);
spi_init_non_standard(SPI_CHANNEL, 16/*instrction length*/, 0/*address length*/, 0/*wait cycles*/,
SPI_AITM_AS_FRAME_FORMAT/*spi address trans mode*/);
spi_send_data_normal_dma(DMAC_CHANNEL0, SPI_CHANNEL, SPI_SLAVE_SELECT,data_buf, length, SPI_TRANS_SHORT);
}
void tft_write_word(uint32_t *data_buf, uint32_t length, uint32_t flag)
{
set_dcx_data();
spi_init(SPI_CHANNEL, SPI_WORK_MODE_0, SPI_FF_OCTAL, 32, 0);
spi_init_non_standard(SPI_CHANNEL, 0/*instrction length*/, 32/*address length*/, 0/*wait cycles*/,
SPI_AITM_AS_FRAME_FORMAT/*spi address trans mode*/);
spi_send_data_normal_dma(DMAC_CHANNEL0, SPI_CHANNEL, SPI_SLAVE_SELECT,data_buf, length, SPI_TRANS_INT);
}
void tft_fill_data(uint32_t *data_buf, uint32_t length)
{
set_dcx_data();
spi_init(SPI_CHANNEL, SPI_WORK_MODE_0, SPI_FF_OCTAL, 32, 0);
spi_init_non_standard(SPI_CHANNEL, 0/*instrction length*/, 32/*address length*/, 0/*wait cycles*/,
SPI_AITM_AS_FRAME_FORMAT/*spi address trans mode*/);
spi_fill_data_dma(DMAC_CHANNEL0, SPI_CHANNEL, SPI_SLAVE_SELECT,data_buf, length);
}
void lcd_polling_enable(void)
{
lcd_ctl.mode = 0;
}
void lcd_interrupt_enable(void)
{
lcd_ctl.mode = 1;
}
int lcd_init(void)
{
uint8_t data = 0;
tft_hard_init();
/*soft reset*/
tft_write_command(SOFTWARE_RESET);
usleep(100000);
/*exit sleep*/
tft_write_command(SLEEP_OFF);
usleep(100000);
/*pixel format*/
tft_write_command(PIXEL_FORMAT_SET);
data = 0x55;
tft_write_byte(&data, 1);
/*display on*/
tft_write_command(DISPALY_ON);
lcd_polling_enable();
lcd_clear(PINK);
lcd_set_direction(DIR_YX_RLDU);
LOG_I("LCD initialization successfully");
}
INIT_APP_EXPORT(lcd_init);
void lcd_set_direction(lcd_dir_t dir)
{
lcd_ctl.dir = dir;
if (dir & DIR_XY_MASK)
{
lcd_ctl.width = LCD_Y_MAX - 1;
lcd_ctl.height = LCD_X_MAX - 1;
}
else
{
lcd_ctl.width = LCD_X_MAX - 1;
lcd_ctl.height = LCD_Y_MAX - 1;
}
tft_write_command(MEMORY_ACCESS_CTL);
tft_write_byte((uint8_t *)&dir, 1);
}
void lcd_set_area(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2)
{
uint8_t data[4] = {0};
data[0] = (uint8_t)(x1 >> 8);
data[1] = (uint8_t)(x1);
data[2] = (uint8_t)(x2 >> 8);
data[3] = (uint8_t)(x2);
tft_write_command(HORIZONTAL_ADDRESS_SET);
tft_write_byte(data, 4);
data[0] = (uint8_t)(y1 >> 8);
data[1] = (uint8_t)(y1);
data[2] = (uint8_t)(y2 >> 8);
data[3] = (uint8_t)(y2);
tft_write_command(VERTICAL_ADDRESS_SET);
tft_write_byte(data, 4);
tft_write_command(MEMORY_WRITE);
}
void lcd_draw_point(uint16_t x, uint16_t y, uint16_t color)
{
lcd_set_area(x, y, x, y);
tft_write_half(&color, 1);
}
void lcd_draw_char(uint16_t x, uint16_t y, char c, uint16_t color)
{
uint8_t i = 0;
uint8_t j = 0;
uint8_t data = 0;
for (i = 0; i < 16; i++)
{
data = ascii0816[c * 16 + i];
for (j = 0; j < 8; j++)
{
if (data & 0x80)
lcd_draw_point(x + j, y, color);
data <<= 1;
}
y++;
}
}
void lcd_draw_string(uint16_t x, uint16_t y, char *str, uint16_t color)
{
while (*str)
{
lcd_draw_char(x, y, *str, color);
str++;
x += 8;
}
}
void lcd_ram_draw_string(char *str, uint32_t *ptr, uint16_t font_color, uint16_t bg_color)
{
uint8_t i = 0;
uint8_t j = 0;
uint8_t data = 0;
uint8_t *pdata = NULL;
uint16_t width = 0;
uint32_t *pixel = NULL;
width = 4 * strlen(str);
while (*str)
{
pdata = (uint8_t *)&ascii0816[(*str) * 16];
for (i = 0; i < 16; i++)
{
data = *pdata++;
pixel = ptr + i * width;
for (j = 0; j < 4; j++)
{
switch (data >> 6)
{
case 0:
*pixel = ((uint32_t)bg_color << 16) | bg_color;
break;
case 1:
*pixel = ((uint32_t)bg_color << 16) | font_color;
break;
case 2:
*pixel = ((uint32_t)font_color << 16) | bg_color;
break;
case 3:
*pixel = ((uint32_t)font_color << 16) | font_color;
break;
default:
*pixel = 0;
break;
}
data <<= 2;
pixel++;
}
}
str++;
ptr += 4;
}
}
void lcd_clear(uint16_t color)
{
uint32_t data = ((uint32_t)color << 16) | (uint32_t)color;
lcd_set_area(0, 0, lcd_ctl.width, lcd_ctl.height);
tft_fill_data(&data, LCD_X_MAX * LCD_Y_MAX / 2);
}
void lcd_draw_rectangle(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2, uint16_t width, uint16_t color)
{
uint32_t data_buf[640] = {0};
uint32_t *p = data_buf;
uint32_t data = color;
uint32_t index = 0;
data = (data << 16) | data;
for (index = 0; index < 160 * width; index++)
*p++ = data;
lcd_set_area(x1, y1, x2, y1 + width - 1);
tft_write_word(data_buf, ((x2 - x1 + 1) * width + 1) / 2, 0);
lcd_set_area(x1, y2 - width + 1, x2, y2);
tft_write_word(data_buf, ((x2 - x1 + 1) * width + 1) / 2, 0);
lcd_set_area(x1, y1, x1 + width - 1, y2);
tft_write_word(data_buf, ((y2 - y1 + 1) * width + 1) / 2, 0);
lcd_set_area(x2 - width + 1, y1, x2, y2);
tft_write_word(data_buf, ((y2 - y1 + 1) * width + 1) / 2, 0);
}
void lcd_draw_picture(uint16_t x1, uint16_t y1, uint16_t width, uint16_t height, uint32_t *ptr)
{
lcd_set_area(x1, y1, x1 + width - 1, y1 + height - 1);
tft_write_word(ptr, width * height / 2, lcd_ctl.mode ? 2 : 0);
}
void lcd_pre()
{
fpioa_set_function(38, FUNC_GPIOHS0 + DCX_GPIONUM);
fpioa_set_function(36, FUNC_SPI0_SS3);
fpioa_set_function(39, FUNC_SPI0_SCLK);
fpioa_set_function(37, FUNC_GPIOHS0 + RST_GPIONUM);
}
void lcd_test0()
{
char test[]={"xuos-intelligence framwork"};
lcd_draw_string(0,0,test,BLUE);
}
MSH_CMD_EXPORT(lcd_test0,lcd show string);
void lcd_test1()
{
lcd_clear(YELLOW);
}
MSH_CMD_EXPORT(lcd_test1,lcd show string);
#endif

519
Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_lcd.h

@ -0,0 +1,519 @@
/* Copyright 2018 Canaan Inc.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef _DRV_LCD_H__
#define _DRV_LCD_H__
#include <stdint.h>
/* clang-format off */
#define NO_OPERATION 0x00
#define SOFTWARE_RESET 0x01
#define READ_ID 0x04
#define READ_STATUS 0x09
#define READ_POWER_MODE 0x0A
#define READ_MADCTL 0x0B
#define READ_PIXEL_FORMAT 0x0C
#define READ_IMAGE_FORMAT 0x0D
#define READ_SIGNAL_MODE 0x0E
#define READ_SELT_DIAG_RESULT 0x0F
#define SLEEP_ON 0x10
#define SLEEP_OFF 0x11
#define PARTIAL_DISPALY_ON 0x12
#define NORMAL_DISPALY_ON 0x13
#define INVERSION_DISPALY_OFF 0x20
#define INVERSION_DISPALY_ON 0x21
#define GAMMA_SET 0x26
#define DISPALY_OFF 0x28
#define DISPALY_ON 0x29
#define HORIZONTAL_ADDRESS_SET 0x2A
#define VERTICAL_ADDRESS_SET 0x2B
#define MEMORY_WRITE 0x2C
#define COLOR_SET 0x2D
#define MEMORY_READ 0x2E
#define PARTIAL_AREA 0x30
#define VERTICAL_SCROL_DEFINE 0x33
#define TEAR_EFFECT_LINE_OFF 0x34
#define TEAR_EFFECT_LINE_ON 0x35
#define MEMORY_ACCESS_CTL 0x36
#define VERTICAL_SCROL_S_ADD 0x37
#define IDLE_MODE_OFF 0x38
#define IDLE_MODE_ON 0x39
#define PIXEL_FORMAT_SET 0x3A
#define WRITE_MEMORY_CONTINUE 0x3C
#define READ_MEMORY_CONTINUE 0x3E
#define SET_TEAR_SCANLINE 0x44
#define GET_SCANLINE 0x45
#define WRITE_BRIGHTNESS 0x51
#define READ_BRIGHTNESS 0x52
#define WRITE_CTRL_DISPALY 0x53
#define READ_CTRL_DISPALY 0x54
#define WRITE_BRIGHTNESS_CTL 0x55
#define READ_BRIGHTNESS_CTL 0x56
#define WRITE_MIN_BRIGHTNESS 0x5E
#define READ_MIN_BRIGHTNESS 0x5F
#define READ_ID1 0xDA
#define READ_ID2 0xDB
#define READ_ID3 0xDC
#define RGB_IF_SIGNAL_CTL 0xB0
#define NORMAL_FRAME_CTL 0xB1
#define IDLE_FRAME_CTL 0xB2
#define PARTIAL_FRAME_CTL 0xB3
#define INVERSION_CTL 0xB4
#define BLANK_PORCH_CTL 0xB5
#define DISPALY_FUNCTION_CTL 0xB6
#define ENTRY_MODE_SET 0xB7
#define BACKLIGHT_CTL1 0xB8
#define BACKLIGHT_CTL2 0xB9
#define BACKLIGHT_CTL3 0xBA
#define BACKLIGHT_CTL4 0xBB
#define BACKLIGHT_CTL5 0xBC
#define BACKLIGHT_CTL7 0xBE
#define BACKLIGHT_CTL8 0xBF
#define POWER_CTL1 0xC0
#define POWER_CTL2 0xC1
#define VCOM_CTL1 0xC5
#define VCOM_CTL2 0xC7
#define NV_MEMORY_WRITE 0xD0
#define NV_MEMORY_PROTECT_KEY 0xD1
#define NV_MEMORY_STATUS_READ 0xD2
#define READ_ID4 0xD3
#define POSITIVE_GAMMA_CORRECT 0xE0
#define NEGATIVE_GAMMA_CORRECT 0xE1
#define DIGITAL_GAMMA_CTL1 0xE2
#define DIGITAL_GAMMA_CTL2 0xE3
#define INTERFACE_CTL 0xF6
#define DCX_GPIONUM (2)
#define RST_GPIONUM (3)
#define SPI_CHANNEL 0
#define SPI_SLAVE_SELECT 3
/* clang-format off */
#define LCD_X_MAX (240)
#define LCD_Y_MAX (320)